diff --git a/pipelined/src/ebu/buscachefsm.sv b/pipelined/src/ebu/buscachefsm.sv index 8435b3ef6..ba8022275 100644 --- a/pipelined/src/ebu/buscachefsm.sv +++ b/pipelined/src/ebu/buscachefsm.sv @@ -62,7 +62,6 @@ module buscachefsm #(parameter integer WordCountThreshold, typedef enum logic [2:0] {STATE_READY, STATE_CAPTURE, STATE_DELAY, - STATE_CPU_BUSY, STATE_CACHE_FETCH, STATE_CACHE_EVICT} busstatetype; @@ -89,10 +88,8 @@ module buscachefsm #(parameter integer WordCountThreshold, else BusNextState = STATE_READY; STATE_CAPTURE: if(HREADY) BusNextState = STATE_DELAY; else BusNextState = STATE_CAPTURE; - STATE_DELAY: if(CPUBusy) BusNextState = STATE_CPU_BUSY; + STATE_DELAY: if(CPUBusy) BusNextState = STATE_DELAY; else BusNextState = STATE_READY; - STATE_CPU_BUSY: if(CPUBusy) BusNextState = STATE_CPU_BUSY; - else BusNextState = STATE_READY; STATE_CACHE_FETCH: if(HREADY & FinalWordCount) BusNextState = STATE_READY; else BusNextState = STATE_CACHE_FETCH; STATE_CACHE_EVICT: if(HREADY & FinalWordCount) BusNextState = STATE_READY; diff --git a/pipelined/src/ebu/busfsm.sv b/pipelined/src/ebu/busfsm.sv index f48ceb1d1..e5cc9891a 100644 --- a/pipelined/src/ebu/busfsm.sv +++ b/pipelined/src/ebu/busfsm.sv @@ -48,8 +48,7 @@ module busfsm typedef enum logic [2:0] {STATE_READY, STATE_CAPTURE, - STATE_DELAY, - STATE_CPU_BUSY} busstatetype; + STATE_DELAY} busstatetype; typedef enum logic [1:0] {AHB_IDLE = 2'b00, AHB_BUSY = 2'b01, AHB_NONSEQ = 2'b10, AHB_SEQ = 2'b11} ahbtranstype; @@ -65,10 +64,8 @@ module busfsm else BusNextState = STATE_READY; STATE_CAPTURE: if(HREADY) BusNextState = STATE_DELAY; else BusNextState = STATE_CAPTURE; - STATE_DELAY: if(CPUBusy) BusNextState = STATE_CPU_BUSY; + STATE_DELAY: if(CPUBusy) BusNextState = STATE_DELAY; else BusNextState = STATE_READY; - STATE_CPU_BUSY: if(CPUBusy) BusNextState = STATE_CPU_BUSY; - else BusNextState = STATE_READY; default: BusNextState = STATE_READY; endcase end