diff --git a/addins/riscv-arch-test b/addins/riscv-arch-test
index 832ab11c0..eeffdf802 160000
--- a/addins/riscv-arch-test
+++ b/addins/riscv-arch-test
@@ -1 +1 @@
-Subproject commit 832ab11c093f332ef83ca9c0ef55845071a7cb3d
+Subproject commit eeffdf802c117f592b30e380b59caf48da384e76
diff --git a/testbench/tests.vh b/testbench/tests.vh
index 923327986..83a7f6828 100644
--- a/testbench/tests.vh
+++ b/testbench/tests.vh
@@ -537,7 +537,6 @@ string arch64cpriv[] = '{
   "rv64i_m/C/src/cebreak-01.S"
 };
 
-// Tests commented out pending riscv-arch-test issue #590
 string arch64zcd[] = '{
   // `RISCVARCHTEST,
   "rv64i_m/D_Zcd/src/c.fld-01.S",
@@ -3431,20 +3430,18 @@ string arch32cpriv[] = '{
   "rv32i_m/C/src/cebreak-01.S"
 };
 
-// Tests commented out pending riscv-arch-test issue #590
 string arch32zcf[] = '{
   // `RISCVARCHTEST,
-  // "rv32i_m/F_Zcf/src/c.flw-01.S",
-  // "rv32i_m/F_Zcf/src/c.flwsp-01.S",
-  // "rv32i_m/F_Zcf/src/c.fsw-01.S",
+  "rv32i_m/F_Zcf/src/c.flw-01.S",
+  "rv32i_m/F_Zcf/src/c.flwsp-01.S",
+  "rv32i_m/F_Zcf/src/c.fsw-01.S",
   "rv32i_m/F_Zcf/src/c.fswsp-01.S"
 };
 
-// Tests commented out pending riscv-arch-test issue #590
 string arch32zcd[] = '{
   // `RISCVARCHTEST,
   "rv32i_m/D_Zcd/src/c.fld-01.S",
-  // "rv32i_m/D_Zcd/src/c.fldsp-01.S",
+  "rv32i_m/D_Zcd/src/c.fldsp-01.S",
   "rv32i_m/D_Zcd/src/c.fsd-01.S",
   "rv32i_m/D_Zcd/src/c.fsdsp-01.S"
 };
diff --git a/tests/riscof/spike/spike_rv32gc_isa.yaml b/tests/riscof/spike/spike_rv32gc_isa.yaml
index 281f58a7b..435d6cf46 100644
--- a/tests/riscof/spike/spike_rv32gc_isa.yaml
+++ b/tests/riscof/spike/spike_rv32gc_isa.yaml
@@ -1,7 +1,7 @@
 hart_ids: [0]
 hart0:
 #  ISA: RV32IMAFDCZicboz_Zicsr_Zicond_Zifencei_Zfa_Zfh_Zca_Zcb_Zba_Zbb_Zbc_Zbkb_Zbkc_Zbkx_Zbs_Zknd_Zkne_Zknh
-  ISA: RV32IMAFDCSUZicsr_Zicond_Zifencei_Zfa_Zfh_Zca_Zcb_Zba_Zbb_Zbc_Zbkb_Zbkc_Zbkx_Zbs_Zknd_Zkne_Zknh
+  ISA: RV32IMAFDCSUZicsr_Zicond_Zifencei_Zfa_Zfh_Zca_Zcb_Zcd_Zcf_Zba_Zbb_Zbc_Zbkb_Zbkc_Zbkx_Zbs_Zknd_Zkne_Zknh
   physical_addr_sz: 32
   User_Spec_Version: '2.3'
   supported_xlen: [32]
@@ -26,4 +26,4 @@ hart0:
               legal:
                 - extensions[25:0] bitmask [0x014112D, 0x0000000]
               wr_illegal:
-                - Unchanged
\ No newline at end of file
+                - Unchanged
diff --git a/tests/riscof/spike/spike_rv64gc_isa.yaml b/tests/riscof/spike/spike_rv64gc_isa.yaml
index 0a939e001..1ab1afb8a 100644
--- a/tests/riscof/spike/spike_rv64gc_isa.yaml
+++ b/tests/riscof/spike/spike_rv64gc_isa.yaml
@@ -1,7 +1,7 @@
 hart_ids: [0]
 hart0:
 #  ISA: RV64IMAFDQCSUZicboz_Zicsr_Zicond_Zifencei_Zfa_Zfh_Zca_Zcb_Zba_Zbb_Zbc_Zbkb_Zbkc_Zbkx_Zbs_Zknd_Zkne_Zknh
-  ISA: RV64IMAFDCSUZicsr_Zicond_Zifencei_Zfa_Zfh_Zca_Zcb_Zba_Zbb_Zbc_Zbkb_Zbkc_Zbkx_Zbs_Zknd_Zkne_Zknh
+  ISA: RV64IMAFDCSUZicsr_Zicond_Zifencei_Zfa_Zfh_Zca_Zcb_Zcd_Zba_Zbb_Zbc_Zbkb_Zbkc_Zbkx_Zbs_Zknd_Zkne_Zknh
 #  ISA: RV64IMAFDQCSUZicsr_Zicond_Zifencei_Zfa_Zfh_Zca_Zcb_Zba_Zbb_Zbc_Zbkb_Zbkc_Zbkx_Zbs_Zknd_Zkne_Zknh  
   physical_addr_sz: 56
   User_Spec_Version: '2.3'