From 5c28553ca1ce041609540ced4cea776d4b570ead Mon Sep 17 00:00:00 2001
From: slmnemo <nlucio@Tera.Eng.HMC.Edu>
Date: Wed, 17 Nov 2021 14:08:08 -0800
Subject: [PATCH] Removed .* from hazard hzu(.*) in  wallypipelinedhart.sv.

---
 wally-pipelined/src/muldiv/muldiv.sv            |  3 ++-
 wally-pipelined/src/wally/wallypipelinedhart.sv | 12 +++++++++++-
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/wally-pipelined/src/muldiv/muldiv.sv b/wally-pipelined/src/muldiv/muldiv.sv
index 55ebc2a31..b3bf4e83e 100644
--- a/wally-pipelined/src/muldiv/muldiv.sv
+++ b/wally-pipelined/src/muldiv/muldiv.sv
@@ -55,7 +55,8 @@ module muldiv (
 	 mul mul(
 	 .clk, .reset,
   	 .StallM, .FlushM,
-	 .ForwardedSrcAE, .ForwardedSrcBE,
+	    // .SrcAE, .SrcBE,
+	 .ForwardedSrcAE, .ForwardedSrcBE, // *** these are the src outputs before the mux choosing between them and PCE to put in srcA/B
 	 .Funct3E,
   	 .ProdM
 	 );
diff --git a/wally-pipelined/src/wally/wallypipelinedhart.sv b/wally-pipelined/src/wally/wallypipelinedhart.sv
index 523c0953d..70cee5a93 100644
--- a/wally-pipelined/src/wally/wallypipelinedhart.sv
+++ b/wally-pipelined/src/wally/wallypipelinedhart.sv
@@ -318,7 +318,17 @@ module wallypipelinedhart (
   
   muldiv mdu(.*); // multiply and divide unit
   
-  hazard     hzu(.*);	// global stall and flush control
+  hazard     hzu(
+        .BPPredWrongE, .CSRWritePendingDEM, .RetM, .TrapM,
+        .LoadStallD, .StoreStallD, .MulDivStallD, .CSRRdStallD,
+	      .LSUStall, .ICacheStallF,
+        .FPUStallD, .FStallD,
+	      .DivBusyE, .FDivBusyE,
+	      .EcallFaultM, .BreakpointFaultM,
+        .InvalidateICacheM,
+  // Stall & flush outputs
+	      .StallF, .StallD, .StallE, .StallM, .StallW,
+	      .FlushF, .FlushD, .FlushE, .FlushM, .FlushW);	// global stall and flush control
 
   // Priveleged block operates in M and W stages, handling CSRs and exceptions
   privileged priv(.*);