mirror of
https://github.com/openhwgroup/cvw
synced 2025-01-24 21:44:29 +00:00
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
This commit is contained in:
commit
5bdb612567
21
linux/buildroot-scripts/Makefile
Normal file
21
linux/buildroot-scripts/Makefile
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@ -0,0 +1,21 @@
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all:
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make disassemble
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make generate
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generate:
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# generating device tree binary
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dtc -I dts -O dtb ../devicetree/wally-virt.dts > ${RISCV}/buildroot/output/images/wally-virt.dtb
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disassemble:
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mkdir ${RISCV}/buildroot/output/images/disassembly
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# fw_jump
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riscv64-unknown-elf-objdump -D ${RISCV}/buildroot/output/images/fw_jump.elf >> ${RISCV}/buildroot/output/images/disassembly/fw_jump.objdump
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# vmlinux
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riscv64-unknown-elf-objdump -D ${RISCV}/buildroot/output/images/vmlinux >> ${RISCV}/buildroot/output/images/disassembly/vmlinux.objdump
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# filesystem
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mkdir ${RISCV}/buildroot/output/images/disassembly/rootfs
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-cd ${RISCV}/buildroot/output/images/disassembly/rootfs; cpio -idv < ../../rootfs.cpio
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clean:
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rm ${RISCV}/buildroot/output/images/wally-virt.dtb
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rm -rf ${RISCV}/buildroot/output/images/disassembly
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@ -262,10 +262,6 @@ module hptw
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UPDATE_PTE: if(`HPTW_WRITES_SUPPORTED & DCacheStallM) NextWalkerState = UPDATE_PTE;
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else NextWalkerState = LEAF;
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default: begin
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// synthesis translate_off
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if (WalkerState !== 'x)
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$error("Default state in HPTW should be unreachable; was %d", WalkerState);
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// synthesis translate_on
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NextWalkerState = IDLE; // should never be reached
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end
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endcase
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