From 5b445946b152cfd567cbe5fb0a457cd2aabd6131 Mon Sep 17 00:00:00 2001
From: "James E. Stine" <james.stine@okstate.edu>
Date: Tue, 5 Mar 2024 09:14:22 -0600
Subject: [PATCH] style file slight mods for sha_instructions

---
 src/ieu/sha_instructions/sha512sig0h.sv | 3 +--
 src/ieu/sha_instructions/sha512sig0l.sv | 3 +--
 src/ieu/sha_instructions/sha512sig1h.sv | 3 +--
 src/ieu/sha_instructions/sha512sig1l.sv | 3 +--
 src/ieu/sha_instructions/sha512sum0r.sv | 3 +--
 src/ieu/sha_instructions/sha512sum1r.sv | 3 +--
 6 files changed, 6 insertions(+), 12 deletions(-)

diff --git a/src/ieu/sha_instructions/sha512sig0h.sv b/src/ieu/sha_instructions/sha512sig0h.sv
index fb23c135a..a26ae0ef7 100644
--- a/src/ieu/sha_instructions/sha512sig0h.sv
+++ b/src/ieu/sha_instructions/sha512sig0h.sv
@@ -25,8 +25,7 @@
 // and limitations under the License.
 ////////////////////////////////////////////////////////////////////////////////////////////////
 
-module sha512sig0h(input logic [31:0] rs1,
-                   input logic [31:0]  rs2,
+module sha512sig0h(input logic [31:0] rs1, input logic [31:0]  rs2,
                    output logic [31:0] data_out);
    
    // RS1 Shifts
diff --git a/src/ieu/sha_instructions/sha512sig0l.sv b/src/ieu/sha_instructions/sha512sig0l.sv
index 3702b18bb..a12568fb5 100644
--- a/src/ieu/sha_instructions/sha512sig0l.sv
+++ b/src/ieu/sha_instructions/sha512sig0l.sv
@@ -25,8 +25,7 @@
 // and limitations under the License.
 ////////////////////////////////////////////////////////////////////////////////////////////////
 
-module sha512sig0l(input logic [31:0] rs1,
-                   input logic [31:0]  rs2,
+module sha512sig0l(input logic [31:0] rs1, input logic [31:0]  rs2,
                    output logic [31:0] data_out);
    
    // rs1 operations                   
diff --git a/src/ieu/sha_instructions/sha512sig1h.sv b/src/ieu/sha_instructions/sha512sig1h.sv
index 05fd66cd1..cce4b593b 100644
--- a/src/ieu/sha_instructions/sha512sig1h.sv
+++ b/src/ieu/sha_instructions/sha512sig1h.sv
@@ -25,8 +25,7 @@
 // and limitations under the License.
 ////////////////////////////////////////////////////////////////////////////////////////////////
 
-module sha512sig1h(input logic [31:0] rs1,
-                   input logic [31:0]  rs2,
+module sha512sig1h(input logic [31:0] rs1, input logic [31:0]  rs2,
                    output logic [31:0] data_out);
    
    // rs1 shifts             
diff --git a/src/ieu/sha_instructions/sha512sig1l.sv b/src/ieu/sha_instructions/sha512sig1l.sv
index 570664a26..dae623091 100644
--- a/src/ieu/sha_instructions/sha512sig1l.sv
+++ b/src/ieu/sha_instructions/sha512sig1l.sv
@@ -25,8 +25,7 @@
 // and limitations under the License.
 ////////////////////////////////////////////////////////////////////////////////////////////////
 
-module sha512sig1l(input logic [31:0] rs1,
-                   input logic [31:0]  rs2,
+module sha512sig1l(input logic [31:0] rs1, input logic [31:0]  rs2,
                    output logic [31:0] data_out);
                   
    // rs1 shift logic
diff --git a/src/ieu/sha_instructions/sha512sum0r.sv b/src/ieu/sha_instructions/sha512sum0r.sv
index bee3b7551..e7ccf4e6e 100644
--- a/src/ieu/sha_instructions/sha512sum0r.sv
+++ b/src/ieu/sha_instructions/sha512sum0r.sv
@@ -25,8 +25,7 @@
 // and limitations under the License.
 ////////////////////////////////////////////////////////////////////////////////////////////////
 
-module sha512sum0r(input logic [31:0] rs1,
-                   input logic [31:0]  rs2,
+module sha512sum0r(input logic [31:0] rs1, input logic [31:0]  rs2,
                    output logic [31:0] data_out);
    
    // RS1 shifts
diff --git a/src/ieu/sha_instructions/sha512sum1r.sv b/src/ieu/sha_instructions/sha512sum1r.sv
index 48428a69f..36ccbc1be 100644
--- a/src/ieu/sha_instructions/sha512sum1r.sv
+++ b/src/ieu/sha_instructions/sha512sum1r.sv
@@ -25,8 +25,7 @@
 // and limitations under the License.
 ////////////////////////////////////////////////////////////////////////////////////////////////
 
-module sha512sum1r(input logic [31:0] rs1,
-                   input logic [31:0]  rs2,
+module sha512sum1r(input logic [31:0] rs1, input logic [31:0]  rs2,
                    output logic [31:0] data_out);   
    
    // Declare logic for rs1 shifts