Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Add warning regarding broken Verilator on Ubuntu 20.04 and Red Hat 8 to compatibility section of README

Browse Source
This commit is contained in:
Jordan Carlin 2024-10-17 00:33:28 -07:00
parent b10f46713e
commit 58e093c9be
No known key found for this signature in database
1 changed files with 5 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
README.md
View File

@ -66,7 +66,11 @@ This section describes the open source toolchain installation.
### Compatibility
The current version of the toolchain has been tested on Ubuntu (versions 20.04 LTS, 22.04 LTS, and 24.04 LTS) and on Red Hat/Rocky/AlmaLinux (versions 8 and 9).
NOTE: Ubuntu 22.04LTS is incompatible with Synopsys Design Compiler.
> [!WARNING]
> Ubuntu 22.04LTS is incompatible with Synopsys Design Compiler.
> [!WARNING]
> Verilator currently fails to simulate correctly on Ubuntu 20.04 LTS and Red Hat/Rocky/AlmaLinux 8.
### Overview
The toolchain installation script installs the following tools:
@ -75,7 +79,6 @@ The toolchain installation script installs the following tools:
- [QEMU](https://www.qemu.org/docs/master/system/target-riscv.html): emulator
- [Spike](https://github.com/riscv-software-src/riscv-isa-sim): functional RISC-V model
- [Verilator](https://github.com/verilator/verilator): open-source Verilog simulator
- NOTE: Verilator does not currently work reliably for simulating Wally on Ubuntu 20.04 LTS and Red Hat 8
- [RISC-V Sail Model](https://github.com/riscv/sail-riscv): golden reference model for RISC-V
- [OSU Skywater 130 cell library](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12): standard cell library
- [RISCOF](https://github.com/riscv-software-src/riscof.git): RISC-V compliance test framework