diff --git a/pipelined/config/shared/wally-shared.vh b/pipelined/config/shared/wally-shared.vh
index 4e43c7217..c8f1a667d 100644
--- a/pipelined/config/shared/wally-shared.vh
+++ b/pipelined/config/shared/wally-shared.vh
@@ -34,7 +34,7 @@
 `define ZBS_SUPPORTED 0
 
 // Memory synthesis configuration
-`define USE_SRAM 0
+`define USE_SRAM 1
 
 // shared constants
 `include "wally-constants.vh"
diff --git a/pipelined/src/generic/mem/ram1p1rwbe.sv b/pipelined/src/generic/mem/ram1p1rwbe.sv
index 47b3f1fe7..0dffb2a70 100644
--- a/pipelined/src/generic/mem/ram1p1rwbe.sv
+++ b/pipelined/src/generic/mem/ram1p1rwbe.sv
@@ -55,7 +55,7 @@ module ram1p1rwbe #(parameter DEPTH=128, WIDTH=256) (
      logic [WIDTH-1:0] BitWriteMask;
      for (index=0; index < WIDTH; index++) 
        assign BitWriteMask[index] = bwe[index/8];
-    ram1p1rwbe_64x128 sram1A (.CLK(clk), .CEB(~ce), .WEB(~we),
+    TS1N28HPCPSVTB64X128M4SW sram1A (.CLK(clk), .CEB(~ce), .WEB(~we),
 			      .A(addr), .D(din), 
 			      .BWEB(~BitWriteMask), .Q(dout));
      
diff --git a/synthDC/.synopsys_dc.setup b/synthDC/.synopsys_dc.setup
index ddb62533e..8b0ba0309 100755
--- a/synthDC/.synopsys_dc.setup
+++ b/synthDC/.synopsys_dc.setup
@@ -48,6 +48,10 @@ set cache_read   $cache_write
 lappend search_path ./scripts
 lappend search_path ./hdl
 lappend search_path ./mapped
+set memory /home/jstine/WallyMem/rv64gc/
+lappend target_library $memory/ts3n28hpcpa128x64m8m_130a/NLDM/ts3n28hpcpa128x64m8m_tt0p9v25c.db
+lappend target_library $memory/ts1n28hpcpsvtb64x128m4sw_180a/NLDM/ts1n28hpcpsvtb64x128m4sw_tt0p9v25c.db
+lappend target_library $memory/ts1n28hpcpsvtb64x44m4sw_180a/NLDM/ts1n28hpcpsvtb64x44m4sw_tt0p9v25c.db
 
 # Set up User Information
 set company "Oklahoma State University"