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bringing Coremark back to life

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This commit is contained in:
David Harris 2021-11-10 12:43:31 -08:00
parent 0cc71f1dec
commit 570f24a9e4
4 changed files with 8 additions and 9 deletions
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8
tests/riscv-coremark/transferobjdump.sh Executable file
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@ -0,0 +1,8 @@
#!/usr/bin/env bash
./build-coremark.sh
riscv64-unknown-elf-objdump -D coremark.bare.riscv > coremarkcodemod.bare.riscv.objdump
cp coremarkcodemod.bare.riscv.objdump ~/riscv-wally/tests/imperas-riscv-tests/riscv-ovpsim-plus/examples/CoreMark/.
pushd ~/riscv-wally/tests/imperas-riscv-tests/riscv-ovpsim-plus/examples/CoreMark
./exe2memfile.pl coremarkcodemod.bare.riscv
popd

8
tests/riscv-coremark/transferobjump.sh
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@ -1,8 +0,0 @@
#!/usr/bin/env bash
./build-coremark.sh
riscv64-unknown-elf-objdump -D coremark.bare.riscv > coremarkcodemod.bare.riscv.objdump
cp coremarkcodemod.bare.riscv.objdump ~/riscv-wally/imperas-riscv-tests/riscv-ovpsim-plus/examples/CoreMark/.
pushd ~/riscv-wally/imperas-riscv-tests/riscv-ovpsim-plus/examples/CoreMark
./exe2memfile.pl coremarkcodemod.bare.riscv
popd

0
wally-pipelined/regression/old/wally-coremark_bare.do → wally-pipelined/regression/wally-coremark_bare.do
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1
wally-pipelined/testbench/testbench.sv
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@ -317,7 +317,6 @@ module riscvassertions;
assert (2**$clog2(`DCACHE_WAYSIZEINBYTES) == `DCACHE_WAYSIZEINBYTES) else $error("DCACHE_WAYSIZEINBYTES must be a power of 2"); assert (2**$clog2(`DCACHE_WAYSIZEINBYTES) == `DCACHE_WAYSIZEINBYTES) else $error("DCACHE_WAYSIZEINBYTES must be a power of 2");
assert (2**$clog2(`ICACHE_BLOCKLENINBITS) == `ICACHE_BLOCKLENINBITS) else $error("ICACHE_BLOCKLENINBITS must be a power of 2"); assert (2**$clog2(`ICACHE_BLOCKLENINBITS) == `ICACHE_BLOCKLENINBITS) else $error("ICACHE_BLOCKLENINBITS must be a power of 2");
assert (2**$clog2(`ICACHE_WAYSIZEINBYTES) == `ICACHE_WAYSIZEINBYTES) else $error("ICACHE_WAYSIZEINBYTES must be a power of 2"); assert (2**$clog2(`ICACHE_WAYSIZEINBYTES) == `ICACHE_WAYSIZEINBYTES) else $error("ICACHE_WAYSIZEINBYTES must be a power of 2");
assert (`ICACHE_NUMWAYS == 1 || `MEM_ICACHE == 0) else $warning("Multiple Instruction Cache ways not yet implemented");
assert (2**$clog2(`ITLB_ENTRIES) == `ITLB_ENTRIES) else $error("ITLB_ENTRIES must be a power of 2"); assert (2**$clog2(`ITLB_ENTRIES) == `ITLB_ENTRIES) else $error("ITLB_ENTRIES must be a power of 2");
assert (2**$clog2(`DTLB_ENTRIES) == `DTLB_ENTRIES) else $error("DTLB_ENTRIES must be a power of 2"); assert (2**$clog2(`DTLB_ENTRIES) == `DTLB_ENTRIES) else $error("DTLB_ENTRIES must be a power of 2");
assert (`TIM_RANGE >= 56'h07FFFFFF) else $warning("Some regression tests will fail if TIM_RANGE is less than 56'h07FFFFFF"); assert (`TIM_RANGE >= 56'h07FFFFFF) else $warning("Some regression tests will fail if TIM_RANGE is less than 56'h07FFFFFF");