From 568aa3c4a6260c1002fb2de0fc8b158ecf67162e Mon Sep 17 00:00:00 2001 From: David Harris Date: Sat, 4 Nov 2023 03:21:07 -0700 Subject: [PATCH] Verilator improvements --- sim/verilate | 10 ++-------- testbench/common/{shadowmem.sv => DCaacheFlushFSM.sv} | 2 +- testbench/wallywrapper.sv | 5 ++--- 3 files changed, 5 insertions(+), 12 deletions(-) rename testbench/common/{shadowmem.sv => DCaacheFlushFSM.sv} (99%) diff --git a/sim/verilate b/sim/verilate index 7aab1ba63..c59494c1d 100755 --- a/sim/verilate +++ b/sim/verilate @@ -8,15 +8,9 @@ basepath=$(dirname $0)/.. #for config in rv32e rv64gc rv32gc rv32imc rv32i rv64i rv64fpquad; do for config in rv64gc; do echo "$config simulating..." - if !($verilator --timescale "1ns/1ns" --timing --cc "$@" --top-module testbench "-I$basepath/config/shared" "-I$basepath/config/$config" $basepath/src/wally/cvw.sv $basepath/testbench/common/*.sv $basepath/testbench/testbench.sv $basepath/src/*/*.sv $basepath/src/*/*/*.sv --relative-includes ); then + if !($verilator --timescale "1ns/1ns" --timing --exe --cc "$@" --top-module testbench "-I$basepath/config/shared" "-I$basepath/config/$config" $basepath/src/cvw.sv $basepath/testbench/testbench.sv $basepath/testbench/common/*.sv $basepath/src/*/*.sv $basepath/src/*/*/*.sv --relative-includes ); then echo "Exiting after $config lint due to errors or warnings" exit 1 fi done -echo "All lints run with no errors or warnings" - -# --lint-only just runs lint rather than trying to compile and simulate -# -I points to the include directory where files such as `include config.vh are found - -# For more exhaustive (and sometimes spurious) warnings, add --Wall to the Verilator command -# Unfortunately, this produces a bunch of UNUSED and UNDRIVEN signal warnings in blocks that are configured to not exist. +echo "Verilation complete" diff --git a/testbench/common/shadowmem.sv b/testbench/common/DCaacheFlushFSM.sv similarity index 99% rename from testbench/common/shadowmem.sv rename to testbench/common/DCaacheFlushFSM.sv index 19884390d..1696a661c 100644 --- a/testbench/common/shadowmem.sv +++ b/testbench/common/DCaacheFlushFSM.sv @@ -1,5 +1,5 @@ /////////////////////////////////////////// -// shadowmem.sv +// DCacheFlushFSM.sv // // Written: David Harris David_Harris@hmc.edu and Ross Thompson ross1728@gmail.com // Modified: 14 June 2023 diff --git a/testbench/wallywrapper.sv b/testbench/wallywrapper.sv index 64b63c54a..990ebfe74 100644 --- a/testbench/wallywrapper.sv +++ b/testbench/wallywrapper.sv @@ -1,11 +1,10 @@ /////////////////////////////////////////// -// testbench.sv +// wallywrapper.sv // // Written: David_Harris@hmc.edu 9 January 2021 // Modified: // -// Purpose: Wally Testbench and helper modules -// Applies test programs from the riscv-arch-test and Imperas suites +// Purpose: Wrapper module to define parameters for Wally Verilator linting // // A component of the Wally configurable RISC-V project. //