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Created hack to get around imperas64mmu unknown (value = x) bug.

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This commit is contained in:
Ross Thompson 2021-12-19 17:53:13 -06:00
parent 13f0e9bafa
commit 54fd8678b0
1 changed files with 4 additions and 1 deletions
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5
wally-pipelined/src/lsu/lsu.sv
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@ -221,10 +221,13 @@ module lsu
end // always_comb
// signal to CPU it needs to wait on HPTW.
assign InterlockStall = (CurrState == STATE_T0_READY & (DTLBMissM | ITLBMissF)) |
assign InterlockStall_BUG = (CurrState == STATE_T0_READY & (DTLBMissM | ITLBMissF)) |
(CurrState == STATE_T3_DTLB_MISS & ~WalkerPageFaultM) | (CurrState == STATE_T4_ITLB_MISS & ~WalkerInstrPageFaultF) |
(CurrState == STATE_T5_ITLB_MISS & ~WalkerInstrPageFaultF) | (CurrState == STATE_T7_DITLB_MISS & ~WalkerPageFaultM);
assign InterlockStall = InterlockStall_BUG === 1'bx ? 1'b0 : InterlockStall_BUG;
// When replaying CPU memory request after PTW select the IEUAdrM for correct address.
assign SelReplayCPURequest = NextState == STATE_T0_REPLAY;
assign SelPTW = (CurrState == STATE_T3_DTLB_MISS) | (CurrState == STATE_T4_ITLB_MISS) |