From 54e09df77cdbf5c2a6acf77661f8e211340ed3d6 Mon Sep 17 00:00:00 2001 From: Huda-10xe Date: Tue, 3 Dec 2024 04:10:22 -0800 Subject: [PATCH] Removing debug signals --- testbench/common/wallyTracer.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/testbench/common/wallyTracer.sv b/testbench/common/wallyTracer.sv index 0e691741c..fbe5d0163 100644 --- a/testbench/common/wallyTracer.sv +++ b/testbench/common/wallyTracer.sv @@ -122,8 +122,8 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi); assign PTE_dM = testbench.dut.core.lsu.dmmu.dmmu.PTE; assign PPN_iM = testbench.dut.core.ifu.immu.immu.tlb.tlb.PPN; assign PPN_dM = testbench.dut.core.lsu.dmmu.dmmu.tlb.tlb.PPN; - assign PageType_iM = testbench.dut.core.lsu.dmmu.dmmu.PageTypeWriteVal; - assign PageType_dM = testbench.dut.core.ifu.immu.immu.PageTypeWriteVal; + assign PageType_iM = testbench.dut.core.ifu.immu.immu.PageTypeWriteVal; + assign PageType_dM = testbench.dut.core.lsu.dmmu.dmmu.PageTypeWriteVal; logic valid;