From 056d3e2931a89c9dd183a2a0b6e92f377609bc19 Mon Sep 17 00:00:00 2001 From: Roman De Santos Date: Sun, 24 Nov 2024 18:41:00 -0800 Subject: [PATCH 01/40] add ZicntrU to fcov --- config/rv32gc/coverage.svh | 3 ++- config/rv64gc/coverage.svh | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index 0403b7e4b..5b6be64db 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -44,4 +44,5 @@ `include "EndianU_coverage.svh" `include "EndianM_coverage.svh" `include "EndianS_coverage.svh" -`include "ExceptionsM_coverage.svh" \ No newline at end of file +`include "ExceptionsM_coverage.svh" +`include "ZicntrU_coverage.svh" \ No newline at end of file diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index e7c574020..78a928382 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -44,6 +44,7 @@ `include "EndianM_coverage.svh" `include "EndianS_coverage.svh" `include "ExceptionsM_coverage.svh" +`include "ZicntrU_coverage.svh" // `include "RV64VM_PMP_coverage.svh" // `include "RV64CBO_VM_coverage.svh" // `include "RV64CBO_PMP_coverage.svh" From 0cbec918e054c4750cab3fdd0924b22a6dec96b3 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Mon, 20 Jan 2025 14:27:03 -0800 Subject: [PATCH 02/40] Add svade to device trees --- linux/devicetree/wally-artya7.dts | 2 +- linux/devicetree/wally-vcu108.dts | 2 +- linux/devicetree/wally-vcu118.dts | 2 +- linux/devicetree/wally-virt.dts | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/linux/devicetree/wally-artya7.dts b/linux/devicetree/wally-artya7.dts index d6ecc02b9..56a12de31 100644 --- a/linux/devicetree/wally-artya7.dts +++ b/linux/devicetree/wally-artya7.dts @@ -31,7 +31,7 @@ status = "okay"; compatible = "riscv"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svade", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm"; riscv,cboz-block-size = <64>; riscv,cbom-block-size = <64>; mmu-type = "riscv,sv48"; diff --git a/linux/devicetree/wally-vcu108.dts b/linux/devicetree/wally-vcu108.dts index 5158e05a2..57e236c9c 100644 --- a/linux/devicetree/wally-vcu108.dts +++ b/linux/devicetree/wally-vcu108.dts @@ -31,7 +31,7 @@ status = "okay"; compatible = "riscv"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svade", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm"; riscv,cboz-block-size = <64>; riscv,cbom-block-size = <64>; mmu-type = "riscv,sv48"; diff --git a/linux/devicetree/wally-vcu118.dts b/linux/devicetree/wally-vcu118.dts index 89f917635..bdfafa2d0 100644 --- a/linux/devicetree/wally-vcu118.dts +++ b/linux/devicetree/wally-vcu118.dts @@ -31,7 +31,7 @@ status = "okay"; compatible = "riscv"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svade", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm"; riscv,cboz-block-size = <64>; riscv,cbom-block-size = <64>; mmu-type = "riscv,sv48"; diff --git a/linux/devicetree/wally-virt.dts b/linux/devicetree/wally-virt.dts index c250e6920..b23d31015 100644 --- a/linux/devicetree/wally-virt.dts +++ b/linux/devicetree/wally-virt.dts @@ -31,7 +31,7 @@ status = "okay"; compatible = "riscv"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svade", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm"; riscv,cboz-block-size = <64>; riscv,cbom-block-size = <64>; mmu-type = "riscv,sv48"; From ff026540ffe77fc5acafef50c565832cb14eb4d2 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Mon, 20 Jan 2025 17:17:43 -0800 Subject: [PATCH 03/40] Add qemuBoot.sh script for linux QEMU boot --- linux/qemuBoot.sh | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100755 linux/qemuBoot.sh diff --git a/linux/qemuBoot.sh b/linux/qemuBoot.sh new file mode 100755 index 000000000..b756ad34a --- /dev/null +++ b/linux/qemuBoot.sh @@ -0,0 +1,10 @@ +#!/bin/bash +BUILDROOT="${BUILDROOT:-$RISCV/buildroot}" +IMAGES="$BUILDROOT"/output/images +qemu-system-riscv64 \ + -M virt -m 256M -nographic \ + -bios "$IMAGES"/fw_jump.bin \ + -kernel "$IMAGES"/Image \ + -initrd "$IMAGES"/rootfs.cpio \ + -dtb "$IMAGES"/wally-virt.dtb \ + -cpu rva22s64,zicond=true,zfa=true,zfh=true,zcb=true,zbc=true,zkn=true,sstc=true,svadu=true,svnapot=true From acf886651e88f57b98f330146e45d82bbaaad00e Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Mon, 20 Jan 2025 19:16:55 -0800 Subject: [PATCH 04/40] Simplify genInitMem.sh using qemuBoot.sh --- linux/genInitMem.sh | 33 +++++++++------------------------ linux/qemuBoot.sh | 8 +++++++- 2 files changed, 16 insertions(+), 25 deletions(-) diff --git a/linux/genInitMem.sh b/linux/genInitMem.sh index b77445add..65e5c9825 100755 --- a/linux/genInitMem.sh +++ b/linux/genInitMem.sh @@ -1,14 +1,12 @@ #!/bin/bash set -e tcpPort=1235 -imageDir=$RISCV/buildroot/output/images tvDir=$RISCV/linux-testvectors rawRamFile="$tvDir/ramGDB.bin" ramFile="$tvDir/ram.bin" rawBootmemFile="$tvDir/bootmemGDB.bin" bootmemFile="$tvDir/bootmem.bin" rawUntrimmedBootmemFile="$tvDir/untrimmedBootmemFileGDB.bin" -DEVICE_TREE=${imageDir}/wally-virt.dtb if ! mkdir -p "$tvDir"; then echo "Error: unable to create linux testvector directory $tvDir!">&2 @@ -26,24 +24,15 @@ if ! test -w "$tvDir"; then fi echo "Launching QEMU in replay mode!" -(qemu-system-riscv64 \ --M virt -m 256M -dtb "$DEVICE_TREE" \ --nographic \ --bios "$imageDir"/fw_jump.bin -kernel "$imageDir"/Image -append "root=/dev/vda ro" -initrd "$imageDir"/rootfs.cpio \ --gdb tcp::$tcpPort -S) \ -& riscv64-unknown-elf-gdb --quiet \ --ex "set pagination off" \ --ex "set logging overwrite on" \ --ex "set logging redirect on" \ --ex "set confirm off" \ --ex "target extended-remote :$tcpPort" \ --ex "maintenance packet Qqemu.PhyMemMode:1" \ --ex "printf \"Creating $rawBootmemFile\n\"" \ --ex "dump binary memory $rawBootmemFile 0x1000 0x1fff" \ --ex "printf \"Creating $rawRamFile\n\"" \ --ex "dump binary memory $rawRamFile 0x80000000 0x8fffffff" \ --ex "kill" \ --ex "q" +./qemuBoot.sh --gdb $tcpPort & +riscv64-unknown-elf-gdb -batch \ + -ex "target remote :$tcpPort" \ + -ex "maintenance packet Qqemu.PhyMemMode:1" \ + -ex "printf \"Creating $rawBootmemFile\n\"" \ + -ex "dump binary memory $rawBootmemFile 0x1000 0x1fff" \ + -ex "printf \"Creating $rawRamFile\n\"" \ + -ex "dump binary memory $rawRamFile 0x80000000 0x8fffffff" \ + -ex "kill" \ echo "Changing Endianness" # Extend files to 8 byte multiple @@ -55,7 +44,3 @@ objcopy --reverse-bytes=8 -F binary "$rawBootmemFile" "$bootmemFile" rm -f "$rawRamFile" "$rawBootmemFile" "$rawUntrimmedBootmemFile" echo "genInitMem.sh completed!" -echo "You may want to restrict write access to $tvDir now and give cad ownership of it." -echo "Run the following:" -echo " sudo chown -R cad:cad $tvDir" -echo " sudo chmod -R go-w $tvDir" diff --git a/linux/qemuBoot.sh b/linux/qemuBoot.sh index b756ad34a..b5f130fc6 100755 --- a/linux/qemuBoot.sh +++ b/linux/qemuBoot.sh @@ -1,10 +1,16 @@ #!/bin/bash BUILDROOT="${BUILDROOT:-$RISCV/buildroot}" IMAGES="$BUILDROOT"/output/images + +if [[ "$1" == "--gdb" && -n "$2" ]]; then + GDB_FLAG="-gdb tcp::$2 -S" +fi + qemu-system-riscv64 \ -M virt -m 256M -nographic \ -bios "$IMAGES"/fw_jump.bin \ -kernel "$IMAGES"/Image \ -initrd "$IMAGES"/rootfs.cpio \ -dtb "$IMAGES"/wally-virt.dtb \ - -cpu rva22s64,zicond=true,zfa=true,zfh=true,zcb=true,zbc=true,zkn=true,sstc=true,svadu=true,svnapot=true + -cpu rva22s64,zicond=true,zfa=true,zfh=true,zcb=true,zbc=true,zkn=true,sstc=true,svadu=true,svnapot=true \ + $GDB_FLAG From 6dd5b9b2686b5d528861e1ca33780bde5b3cd1dd Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Mon, 20 Jan 2025 19:21:00 -0800 Subject: [PATCH 05/40] Add header to qemuBoot --- linux/qemuBoot.sh | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/linux/qemuBoot.sh b/linux/qemuBoot.sh index b5f130fc6..9cef11bc5 100755 --- a/linux/qemuBoot.sh +++ b/linux/qemuBoot.sh @@ -1,4 +1,30 @@ #!/bin/bash +########################################### +## Boot linux on QEMU configured to match Wally +## +## Written: Jordan Carlin, jcarlin@hmc.edu +## Created: 20 January 2025 +## Modified: +## +## A component of the CORE-V-WALLY configurable RISC-V project. +## https://github.com/openhwgroup/cvw +## +## Copyright (C) 2021-25 Harvey Mudd College & Oklahoma State University +## +## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 +## +## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file +## except in compliance with the License, or, at your option, the Apache License version 2.0. You +## may obtain a copy of the License at +## +## https:##solderpad.org/licenses/SHL-2.1/ +## +## Unless required by applicable law or agreed to in writing, any work distributed under the +## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +## either express or implied. See the License for the specific language governing permissions +## and limitations under the License. +################################################################################################ + BUILDROOT="${BUILDROOT:-$RISCV/buildroot}" IMAGES="$BUILDROOT"/output/images From 408e7365f97502136083a2aab17e1ba90867b9c9 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Tue, 21 Jan 2025 01:19:36 -0800 Subject: [PATCH 06/40] Integrate genInitMem.sh directly into Makefile and simplify --- linux/Makefile | 89 +++++++++++++++++++++++++++------------------ linux/genInitMem.sh | 46 ----------------------- 2 files changed, 54 insertions(+), 81 deletions(-) delete mode 100755 linux/genInitMem.sh diff --git a/linux/Makefile b/linux/Makefile index c0b6c3511..8852c02ad 100644 --- a/linux/Makefile +++ b/linux/Makefile @@ -1,25 +1,26 @@ +# .SECONDEXPANSION: + BUILDROOT := buildroot IMAGES := ${BUILDROOT}/output/images WALLYLINUX := $(WALLY)/linux DIS := ${IMAGES}/disassembly BR2_EXTERNAL_TREE := $(WALLYLINUX)/br2-external-tree +LINUX_TEST_VECTORS := $(RISCV)/linux-testvectors # set sudo if needed depending on $RISCV SUDO := $(shell mkdir -p $(RISCV)/.test > /dev/null 2>&1 || echo sudo) # Device tree files -DTS ?= $(shell find devicetree -type f -regex ".*\.dts" | sort) -DTB := $(DTS:%.dts=%.dtb) -DTB := $(foreach name, $(DTB), $(IMAGES)/$(shell basename $(name))) +DTS ?= $(wildcard devicetree/*.dts) +DTB := $(foreach name, $(DTS:%.dts=%.dtb), $(IMAGES)/$(notdir $(name))) # Disassembly stuff BINARIES := fw_jump.elf vmlinux busybox -OBJDUMPS := $(foreach name, $(BINARIES), $(basename $(name) .elf)) -OBJDUMPS := $(foreach name, $(OBJDUMPS), $(DIS)/$(name).objdump) +OBJDUMPS := $(foreach name, $(basename $(BINARIES) .elf), $(DIS)/$(name).objdump) -.PHONY: all generate disassemble install clean cleanDTB check_write_permissions check_environment +.PHONY: all check_environment check_write_permissions config Image disassemble generate install dumptvs clean cleanDTB -all: check_environment check_write_permissions clean download Image disassemble install dumptvs +all: check_write_permissions clean config Image disassemble install dumptvs check_environment: $(RISCV) ifeq ($(findstring :$(RISCV)/lib:,:$(LD_LIBRARY_PATH):),) @@ -28,7 +29,7 @@ ifeq ($(findstring :$(RISCV)/lib:,:$(LD_LIBRARY_PATH):),) && exit 1) endif -check_write_permissions: +check_write_permissions: check_environment ifeq ($(SUDO), sudo) @echo "Cannot write to '$(RISCV)'." \ "Using sudo (you may be prompted for your password several times throughout the install)" @@ -38,24 +39,44 @@ endif && exit 1) @$(SUDO) rm -r $(RISCV)/.test -Image: check_environment +Image: check_environment $(BUILDROOT) bash -c "unset LD_LIBRARY_PATH; $(MAKE) -C $(BUILDROOT)" - $(MAKE) generate +# $(MAKE) generate @echo "Buildroot Image successfully generated." -install: check_write_permissions check_environment +install: check_write_permissions $(SUDO) rm -rf $(RISCV)/$(BUILDROOT) $(SUDO) mv $(BUILDROOT) $(RISCV)/$(BUILDROOT) @echo "Buildroot successfully installed." -dumptvs: check_write_permissions check_environment - $(SUDO) mkdir -p $(RISCV)/linux-testvectors - ./genInitMem.sh - @echo "Testvectors successfully generated." +TCP_PORT=1235 +RAW_RAM_FILE=${LINUX_TEST_VECTORS}/ramGDB.bin +RAM_FILE=${LINUX_TEST_VECTORS}/ram.bin +RAW_BOOTMEM_FILE=${LINUX_TEST_VECTORS}/bootmemGDB.bin +BOOTMEM_FILE=${LINUX_TEST_VECTORS}/bootmem.bin + +MEM_FILES=${RAM_FILE} ${BOOTMEM_FILE} + +dumptvs: check_write_permissions ${MEM_FILES} + +${LINUX_TEST_VECTORS}/%.bin: ${LINUX_TEST_VECTORS}/%GDB.bin + truncate -s %8 $^ # Extend file to 8 byte multiple + objcopy --reverse-bytes=8 -F binary $^ $@ # Reverse bytes + +${LINUX_TEST_VECTORS}/%GDB.bin: | $(LINUX_TEST_VECTORS) + ${WALLYLINUX}/qemuBoot.sh --gdb ${TCP_PORT} & + riscv64-unknown-elf-gdb -batch \ + -ex "target remote :${TCP_PORT}" \ + -ex "maintenance packet Qqemu.PhyMemMode:1" \ + -ex "printf \"Creating ${RAW_BOOTMEM_FILE}\n\"" \ + -ex "dump binary memory ${RAW_BOOTMEM_FILE} 0x1000 0x1fff" \ + -ex "printf \"Creating ${RAW_RAM_FILE}\n\"" \ + -ex "dump binary memory ${RAW_RAM_FILE} 0x80000000 0x8fffffff" \ + -ex "kill" \ generate: $(DTB) $(IMAGES) -$(IMAGES)/%.dtb: ./devicetree/%.dts +$(IMAGES)/%.dtb: ${WALLYLINUX}/devicetree/%.dts dtc -I dts -O dtb $< > $@ $(IMAGES): @@ -68,42 +89,40 @@ $(RISCV): # Disassembly rules --------------------------------------------------- disassemble: check_environment - rm -rf $(BUILDROOT)/output/images/disassembly - find $(BUILDROOT)/output/build/linux-* -maxdepth 1 -name "vmlinux" | xargs cp -t $(BUILDROOT)/output/images/ - mkdir -p $(DIS) - $(MAKE) $(OBJDUMPS) - # extract rootfs - mkdir -p $(BUILDROOT)/output/images/disassembly/rootfs - @echo "Ignore error about dev/console when extracting rootfs from rootfs.cpio" - -cpio -i -D $(BUILDROOT)/output/images/disassembly/rootfs < $(BUILDROOT)/output/images/rootfs.cpio - @echo "Disassembly successfully completed." + cp $(BUILDROOT)/output/build/linux-*/vmlinux $(IMAGES) + $(MAKE) $(OBJDUMPS) $(DIS)/rootfs -$(DIS)/%.objdump: $(IMAGES)/%.elf +$(DIS)/rootfs: $(IMAGES)/rootfs.cpio + @echo "Ignore error about dev/console when extracting rootfs from rootfs.cpio" + mkdir -p $(DIS)/rootfs + -cpio -i -D $(DIS)/rootfs < $(IMAGES)rootfs.cpio + +$(DIS)/%.objdump: $(IMAGES)/%.elf | $(DIS) riscv64-unknown-elf-objdump -DS $< >> $@ $(WALLY)/bin/extractFunctionRadix.sh $@ -$(DIS)/%.objdump: $(IMAGES)/% +$(DIS)/%.objdump: $(IMAGES)/% | $(DIS) riscv64-unknown-elf-objdump -S $< >> $@ $(WALLY)/bin/extractFunctionRadix.sh $@ $(IMAGES)/vmlinux: - linuxDir=$$(find $(BUILDROOT)/output/build -maxdepth 2 -type d -regex ".*/linux-[0-9]+\.[0-9]+\.[0-9]+$$") ;\ - cp $$linuxDir/vmlinux $@ ;\ + cp $(BUILDROOT)/output/build/linux-*/vmlinux $@ $(IMAGES)/busybox: - busyboxDir=$$(find $(BUILDROOT)/output/build -maxdepth 2 -type d -regex ".*/busybox-[0-9]+\.[0-9]+\.[0-9]+$$") ;\ - cp $$busyboxDir/busybox $@ ;\ + cp $(BUILDROOT)/output/build/busybox-*/busybox $@ -# Generating new Buildroot directories -------------------------------- -download: $(BUILDROOT) +config: $(BUILDROOT) $(BR2_EXTERNAL_TREE)/configs/wally_defconfig $(MAKE) -C $(BUILDROOT) wally_defconfig BR2_EXTERNAL=$(BR2_EXTERNAL_TREE) - @echo "Buildroot successfully download." $(BUILDROOT): git clone https://github.com/buildroot/buildroot.git $@ cd $@; git checkout 2024.11.x -# --------------------------------------------------------------------- +$(LINUX_TEST_VECTORS): + $(SUDO) mkdir -p $@ + +$(DIS): + mkdir -p $@ cleanDTB: rm -f $(IMAGES)/*.dtb diff --git a/linux/genInitMem.sh b/linux/genInitMem.sh deleted file mode 100755 index 65e5c9825..000000000 --- a/linux/genInitMem.sh +++ /dev/null @@ -1,46 +0,0 @@ -#!/bin/bash -set -e -tcpPort=1235 -tvDir=$RISCV/linux-testvectors -rawRamFile="$tvDir/ramGDB.bin" -ramFile="$tvDir/ram.bin" -rawBootmemFile="$tvDir/bootmemGDB.bin" -bootmemFile="$tvDir/bootmem.bin" -rawUntrimmedBootmemFile="$tvDir/untrimmedBootmemFileGDB.bin" - -if ! mkdir -p "$tvDir"; then - echo "Error: unable to create linux testvector directory $tvDir!">&2 - echo "Please try running as sudo.">&2 - exit 1 -fi -if ! test -w "$tvDir"; then - echo "Using sudo to gain access to $tvDir" - if ! sudo chmod -R a+rw "$tvDir"; then - echo "Error: insuffcient write privileges for linux testvector directory $tvDir !">&2 - echo "Please chmod it. For example:">&2 - echo " sudo chmod -R a+rw $tvDir">&2 - exit 1 - fi -fi - -echo "Launching QEMU in replay mode!" -./qemuBoot.sh --gdb $tcpPort & -riscv64-unknown-elf-gdb -batch \ - -ex "target remote :$tcpPort" \ - -ex "maintenance packet Qqemu.PhyMemMode:1" \ - -ex "printf \"Creating $rawBootmemFile\n\"" \ - -ex "dump binary memory $rawBootmemFile 0x1000 0x1fff" \ - -ex "printf \"Creating $rawRamFile\n\"" \ - -ex "dump binary memory $rawRamFile 0x80000000 0x8fffffff" \ - -ex "kill" \ - -echo "Changing Endianness" -# Extend files to 8 byte multiple -truncate -s %8 "$rawRamFile" -truncate -s %8 "$rawBootmemFile" -# Reverse bytes -objcopy --reverse-bytes=8 -F binary "$rawRamFile" "$ramFile" -objcopy --reverse-bytes=8 -F binary "$rawBootmemFile" "$bootmemFile" -rm -f "$rawRamFile" "$rawBootmemFile" "$rawUntrimmedBootmemFile" - -echo "genInitMem.sh completed!" From 2616b1c667de91b049d1cf03807dede8ca4e8cc2 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Tue, 21 Jan 2025 20:14:01 -0800 Subject: [PATCH 07/40] Overhaul linux makefile --- linux/Makefile | 127 +++++++++--------- linux/README.MD | 2 +- .../board/wally/post_image.sh | 5 + .../br2-external-tree/configs/wally_defconfig | 1 + 4 files changed, 70 insertions(+), 65 deletions(-) create mode 100644 linux/br2-external-tree/board/wally/post_image.sh diff --git a/linux/Makefile b/linux/Makefile index 8852c02ad..3c0c996d3 100644 --- a/linux/Makefile +++ b/linux/Makefile @@ -1,27 +1,32 @@ -# .SECONDEXPANSION: - -BUILDROOT := buildroot -IMAGES := ${BUILDROOT}/output/images -WALLYLINUX := $(WALLY)/linux -DIS := ${IMAGES}/disassembly +BUILDROOT := buildroot +IMAGE_DIR := ${BUILDROOT}/output/images +DISASSEMBLY_DIR := ${IMAGE_DIR}/disassembly +WALLYLINUX := $(WALLY)/linux BR2_EXTERNAL_TREE := $(WALLYLINUX)/br2-external-tree -LINUX_TEST_VECTORS := $(RISCV)/linux-testvectors +LINUX_TESTVECTORS := $(RISCV)/linux-testvectors -# set sudo if needed depending on $RISCV -SUDO := $(shell mkdir -p $(RISCV)/.test > /dev/null 2>&1 || echo sudo) +BUILDROOT_OUTPUTS := Image fw_jump.bin fw_jump.elf rootfs.cpio vmlinux busybox # Device tree files DTS ?= $(wildcard devicetree/*.dts) -DTB := $(foreach name, $(DTS:%.dts=%.dtb), $(IMAGES)/$(notdir $(name))) +DTB := $(foreach name, $(DTS:%.dts=%.dtb), $(IMAGE_DIR)/$(notdir $(name))) -# Disassembly stuff +# Disassembly files BINARIES := fw_jump.elf vmlinux busybox -OBJDUMPS := $(foreach name, $(basename $(BINARIES) .elf), $(DIS)/$(name).objdump) +OBJDUMPS := $(foreach name, $(basename $(BINARIES) .elf), $(DISASSEMBLY_DIR)/$(name).objdump) -.PHONY: all check_environment check_write_permissions config Image disassemble generate install dumptvs clean cleanDTB +# Testvector files +RAW_RAM_FILE := ${LINUX_TESTVECTORS}/ramGDB.bin +RAM_FILE := ${LINUX_TESTVECTORS}/ram.bin +RAW_BOOTMEM_FILE := ${LINUX_TESTVECTORS}/bootmemGDB.bin +BOOTMEM_FILE := ${LINUX_TESTVECTORS}/bootmem.bin -all: check_write_permissions clean config Image disassemble install dumptvs +.PHONY: all check_environment check_write_permissions config build disassemble devicetrees install dumptvs clean cleanDTB +# Default target +all: check_write_permissions clean config build disassemble install dumptvs + +# Check if the environment variables are set correctly check_environment: $(RISCV) ifeq ($(findstring :$(RISCV)/lib:,:$(LD_LIBRARY_PATH):),) @(echo "ERROR: Your environment variables are not set correctly." >&2 \ @@ -29,6 +34,8 @@ ifeq ($(findstring :$(RISCV)/lib:,:$(LD_LIBRARY_PATH):),) && exit 1) endif +# Check if the user has write permissions to the RISCV directory, potentially using sudo +SUDO := $(shell mkdir -p $(RISCV)/.test > /dev/null 2>&1 || echo sudo) check_write_permissions: check_environment ifeq ($(SUDO), sudo) @echo "Cannot write to '$(RISCV)'." \ @@ -39,31 +46,30 @@ endif && exit 1) @$(SUDO) rm -r $(RISCV)/.test -Image: check_environment $(BUILDROOT) - bash -c "unset LD_LIBRARY_PATH; $(MAKE) -C $(BUILDROOT)" -# $(MAKE) generate - @echo "Buildroot Image successfully generated." +# Build buildroot and device tree binaries +build: $(BUILDROOT_OUTPUTS) devicetrees +# Build buildroot itself +# LD_LIBRARY_PATH must be unset to avoid conflicts between the host and cross compiler +$(BUILDROOT_OUTPUTS): check_environment $(BUILDROOT) + bash -c "unset LD_LIBRARY_PATH; $(MAKE) -C $(BUILDROOT)" + +# Install buildroot to $RISCV install: check_write_permissions $(SUDO) rm -rf $(RISCV)/$(BUILDROOT) $(SUDO) mv $(BUILDROOT) $(RISCV)/$(BUILDROOT) - @echo "Buildroot successfully installed." -TCP_PORT=1235 -RAW_RAM_FILE=${LINUX_TEST_VECTORS}/ramGDB.bin -RAM_FILE=${LINUX_TEST_VECTORS}/ram.bin -RAW_BOOTMEM_FILE=${LINUX_TEST_VECTORS}/bootmemGDB.bin -BOOTMEM_FILE=${LINUX_TEST_VECTORS}/bootmem.bin +# Generate linux boot testvectors +dumptvs: ${RAM_FILE} ${BOOTMEM_FILE} -MEM_FILES=${RAM_FILE} ${BOOTMEM_FILE} - -dumptvs: check_write_permissions ${MEM_FILES} - -${LINUX_TEST_VECTORS}/%.bin: ${LINUX_TEST_VECTORS}/%GDB.bin +# Format QEMU memory dumps for use as testvectors +${LINUX_TESTVECTORS}/%.bin: ${LINUX_TESTVECTORS}/%GDB.bin truncate -s %8 $^ # Extend file to 8 byte multiple objcopy --reverse-bytes=8 -F binary $^ $@ # Reverse bytes -${LINUX_TEST_VECTORS}/%GDB.bin: | $(LINUX_TEST_VECTORS) +# Generate memory dumps from QEMU buildroot boot +TCP_PORT := 1235 +${LINUX_TESTVECTORS}/%GDB.bin: | $(LINUX_TESTVECTORS) ${WALLYLINUX}/qemuBoot.sh --gdb ${TCP_PORT} & riscv64-unknown-elf-gdb -batch \ -ex "target remote :${TCP_PORT}" \ @@ -72,60 +78,53 @@ ${LINUX_TEST_VECTORS}/%GDB.bin: | $(LINUX_TEST_VECTORS) -ex "dump binary memory ${RAW_BOOTMEM_FILE} 0x1000 0x1fff" \ -ex "printf \"Creating ${RAW_RAM_FILE}\n\"" \ -ex "dump binary memory ${RAW_RAM_FILE} 0x80000000 0x8fffffff" \ - -ex "kill" \ + -ex "kill" -generate: $(DTB) $(IMAGES) - -$(IMAGES)/%.dtb: ${WALLYLINUX}/devicetree/%.dts +# Generate device tree binaries +devicetrees: $(DTB) +$(IMAGE_DIR)/%.dtb: ${WALLYLINUX}/devicetree/%.dts dtc -I dts -O dtb $< > $@ -$(IMAGES): - @ echo "No output/images directory in buildroot." - @ echo "Run make --jobs in buildroot directory before generating device tree binaries."; exit 1 +# Create disassembly files +disassemble: check_environment $(OBJDUMPS) $(DISASSEMBLY_DIR)/rootfs -$(RISCV): - @ echo "ERROR: No $(RISCV) directory. Make sure you have installed the Wally Toolchain." - @ echo "and sourced setup.sh" - -# Disassembly rules --------------------------------------------------- -disassemble: check_environment - cp $(BUILDROOT)/output/build/linux-*/vmlinux $(IMAGES) - $(MAKE) $(OBJDUMPS) $(DIS)/rootfs - -$(DIS)/rootfs: $(IMAGES)/rootfs.cpio +# Extract rootfs +$(DISASSEMBLY_DIR)/rootfs: $(IMAGE_DIR)/rootfs.cpio @echo "Ignore error about dev/console when extracting rootfs from rootfs.cpio" - mkdir -p $(DIS)/rootfs - -cpio -i -D $(DIS)/rootfs < $(IMAGES)rootfs.cpio + mkdir -p $(DISASSEMBLY_DIR)/rootfs + -cpio -i -D $(DISASSEMBLY_DIR)/rootfs -F $(IMAGE_DIR)rootfs.cpio -$(DIS)/%.objdump: $(IMAGES)/%.elf | $(DIS) - riscv64-unknown-elf-objdump -DS $< >> $@ +# Disassemble binaries +objdump_flags = $(if $(findstring .elf,$<),-SD,-S) # Add -D flag for .elf files +$(DISASSEMBLY_DIR)/%.objdump: $(IMAGE_DIR)/% | $(DISASSEMBLY_DIR) + riscv64-unknown-elf-objdump $(objdump_flags) $< >> $@ $(WALLY)/bin/extractFunctionRadix.sh $@ -$(DIS)/%.objdump: $(IMAGES)/% | $(DIS) - riscv64-unknown-elf-objdump -S $< >> $@ - $(WALLY)/bin/extractFunctionRadix.sh $@ - -$(IMAGES)/vmlinux: - cp $(BUILDROOT)/output/build/linux-*/vmlinux $@ - -$(IMAGES)/busybox: - cp $(BUILDROOT)/output/build/busybox-*/busybox $@ - +# Load wally buildroot configuration config: $(BUILDROOT) $(BR2_EXTERNAL_TREE)/configs/wally_defconfig $(MAKE) -C $(BUILDROOT) wally_defconfig BR2_EXTERNAL=$(BR2_EXTERNAL_TREE) +# Clone buildroot and checkout the correct version $(BUILDROOT): git clone https://github.com/buildroot/buildroot.git $@ cd $@; git checkout 2024.11.x -$(LINUX_TEST_VECTORS): +# Create directories +$(LINUX_TESTVECTORS): check_write_permissions $(SUDO) mkdir -p $@ -$(DIS): +$(DISASSEMBLY_DIR): mkdir -p $@ +# Remove device tree binaries cleanDTB: - rm -f $(IMAGES)/*.dtb + rm -f $(IMAGE_DIR)/*.dtb +# Remove buildroot directory clean: rm -rf $(BUILDROOT) + +# Check if the RISCV environment variable is set +$(RISCV): + @ echo "ERROR: No $(RISCV) directory. Make sure you have installed the Wally Toolchain." + @ echo "and sourced setup.sh" diff --git a/linux/README.MD b/linux/README.MD index b7a031ce6..2e8405f70 100644 --- a/linux/README.MD +++ b/linux/README.MD @@ -35,7 +35,7 @@ The device tree files for the various FPGAs Wally supports, as well as QEMU's de They are built automatically using the main `make` command. To build the device tree binaries (.dtb) from the device tree sources (.dts) separately, we can build all of them at once using: ```bash -$ make generate # optionally override BUILDROOT +$ make devicetrees # optionally override BUILDROOT ``` The .dts files will end up in the `/output/images` folder of your chosen buildroot directory. diff --git a/linux/br2-external-tree/board/wally/post_image.sh b/linux/br2-external-tree/board/wally/post_image.sh new file mode 100644 index 000000000..53544d8b3 --- /dev/null +++ b/linux/br2-external-tree/board/wally/post_image.sh @@ -0,0 +1,5 @@ +#!/bin/sh + +# Copy linux and busybox binaries (with symbol info) to images directory +cp "$BUILD_DIR"/linux-*/vmlinux "$BINARIES_DIR"/vmlinux +cp "$BUILD_DIR"busybox-*/busybox "$BINARIES_DIR"/busybox diff --git a/linux/br2-external-tree/configs/wally_defconfig b/linux/br2-external-tree/configs/wally_defconfig index 24d82e9d0..8759588a7 100644 --- a/linux/br2-external-tree/configs/wally_defconfig +++ b/linux/br2-external-tree/configs/wally_defconfig @@ -19,6 +19,7 @@ BR2_TARGET_GENERIC_ISSUE="Greetings! This RISC-V Linux image was built for Wally BR2_ROOTFS_DEVICE_TABLE_SUPPORTS_EXTENDED_ATTRIBUTES=y BR2_SYSTEM_DHCP="eth0" BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_WALLY_PATH)/board/wally/rootfs_overlay" +BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_WALLY_PATH)/board/wally/post_image.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.12.8" From f3a16e90a9d9b243435e7f2b922c448f072aecf4 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Tue, 21 Jan 2025 20:33:25 -0800 Subject: [PATCH 08/40] A little more simplification --- linux/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/linux/Makefile b/linux/Makefile index 3c0c996d3..45588e7f7 100644 --- a/linux/Makefile +++ b/linux/Makefile @@ -91,8 +91,7 @@ disassemble: check_environment $(OBJDUMPS) $(DISASSEMBLY_DIR)/rootfs # Extract rootfs $(DISASSEMBLY_DIR)/rootfs: $(IMAGE_DIR)/rootfs.cpio @echo "Ignore error about dev/console when extracting rootfs from rootfs.cpio" - mkdir -p $(DISASSEMBLY_DIR)/rootfs - -cpio -i -D $(DISASSEMBLY_DIR)/rootfs -F $(IMAGE_DIR)rootfs.cpio + -cpio -id -D $(DISASSEMBLY_DIR)/rootfs -F $(IMAGE_DIR)rootfs.cpio # Disassemble binaries objdump_flags = $(if $(findstring .elf,$<),-SD,-S) # Add -D flag for .elf files From 3e9f2d0b276446dbe09cce3f2715b45f720c0a24 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Tue, 21 Jan 2025 22:58:33 -0800 Subject: [PATCH 09/40] Fix a few more linux build issues --- linux/Makefile | 13 +++++++++---- linux/br2-external-tree/board/wally/post_image.sh | 2 +- linux/br2-external-tree/configs/wally_defconfig | 1 + 3 files changed, 11 insertions(+), 5 deletions(-) mode change 100644 => 100755 linux/br2-external-tree/board/wally/post_image.sh diff --git a/linux/Makefile b/linux/Makefile index 45588e7f7..aed0ec9e3 100644 --- a/linux/Makefile +++ b/linux/Makefile @@ -6,6 +6,7 @@ BR2_EXTERNAL_TREE := $(WALLYLINUX)/br2-external-tree LINUX_TESTVECTORS := $(RISCV)/linux-testvectors BUILDROOT_OUTPUTS := Image fw_jump.bin fw_jump.elf rootfs.cpio vmlinux busybox +BUILDROOT_OUTPUTS := $(foreach name, $(BUILDROOT_OUTPUTS), $(IMAGE_DIR)/$(name)) # Device tree files DTS ?= $(wildcard devicetree/*.dts) @@ -51,7 +52,7 @@ build: $(BUILDROOT_OUTPUTS) devicetrees # Build buildroot itself # LD_LIBRARY_PATH must be unset to avoid conflicts between the host and cross compiler -$(BUILDROOT_OUTPUTS): check_environment $(BUILDROOT) +$(BUILDROOT_OUTPUTS) $(IMAGE_DIR): check_environment $(BUILDROOT) bash -c "unset LD_LIBRARY_PATH; $(MAKE) -C $(BUILDROOT)" # Install buildroot to $RISCV @@ -82,7 +83,7 @@ ${LINUX_TESTVECTORS}/%GDB.bin: | $(LINUX_TESTVECTORS) # Generate device tree binaries devicetrees: $(DTB) -$(IMAGE_DIR)/%.dtb: ${WALLYLINUX}/devicetree/%.dts +$(IMAGE_DIR)/%.dtb: ${WALLYLINUX}/devicetree/%.dts | $(IMAGE_DIR) dtc -I dts -O dtb $< > $@ # Create disassembly files @@ -94,9 +95,13 @@ $(DISASSEMBLY_DIR)/rootfs: $(IMAGE_DIR)/rootfs.cpio -cpio -id -D $(DISASSEMBLY_DIR)/rootfs -F $(IMAGE_DIR)rootfs.cpio # Disassemble binaries -objdump_flags = $(if $(findstring .elf,$<),-SD,-S) # Add -D flag for .elf files $(DISASSEMBLY_DIR)/%.objdump: $(IMAGE_DIR)/% | $(DISASSEMBLY_DIR) - riscv64-unknown-elf-objdump $(objdump_flags) $< >> $@ + riscv64-unknown-elf-objdump -S $< >> $@ + $(WALLY)/bin/extractFunctionRadix.sh $@ + +# Disassemble binaries ending in .elf +$(DISASSEMBLY_DIR)/%.objdump: $(IMAGE_DIR)/%.elf | $(DISASSEMBLY_DIR) + riscv64-unknown-elf-objdump -SD $< >> $@ $(WALLY)/bin/extractFunctionRadix.sh $@ # Load wally buildroot configuration diff --git a/linux/br2-external-tree/board/wally/post_image.sh b/linux/br2-external-tree/board/wally/post_image.sh old mode 100644 new mode 100755 index 53544d8b3..e3db7525b --- a/linux/br2-external-tree/board/wally/post_image.sh +++ b/linux/br2-external-tree/board/wally/post_image.sh @@ -2,4 +2,4 @@ # Copy linux and busybox binaries (with symbol info) to images directory cp "$BUILD_DIR"/linux-*/vmlinux "$BINARIES_DIR"/vmlinux -cp "$BUILD_DIR"busybox-*/busybox "$BINARIES_DIR"/busybox +cp "$BUILD_DIR"/busybox-*/busybox "$BINARIES_DIR"/busybox diff --git a/linux/br2-external-tree/configs/wally_defconfig b/linux/br2-external-tree/configs/wally_defconfig index 8759588a7..bdae60a6f 100644 --- a/linux/br2-external-tree/configs/wally_defconfig +++ b/linux/br2-external-tree/configs/wally_defconfig @@ -10,6 +10,7 @@ BR2_GNU_MIRROR="http://ftpmirror.gnu.org" BR2_ENABLE_DEBUG=y BR2_DEBUG_3=y # BR2_STRIP_strip is not set +BR2_PER_PACKAGE_DIRECTORIES=y # BR2_PIC_PIE is not set BR2_SSP_NONE=y BR2_RELRO_NONE=y From aaaefbaf0dd7bab2cbc57badb94f8078dfeb8e37 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Wed, 22 Jan 2025 15:17:55 -0800 Subject: [PATCH 10/40] Fix typo --- linux/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux/Makefile b/linux/Makefile index aed0ec9e3..78582ba29 100644 --- a/linux/Makefile +++ b/linux/Makefile @@ -92,7 +92,7 @@ disassemble: check_environment $(OBJDUMPS) $(DISASSEMBLY_DIR)/rootfs # Extract rootfs $(DISASSEMBLY_DIR)/rootfs: $(IMAGE_DIR)/rootfs.cpio @echo "Ignore error about dev/console when extracting rootfs from rootfs.cpio" - -cpio -id -D $(DISASSEMBLY_DIR)/rootfs -F $(IMAGE_DIR)rootfs.cpio + -cpio -id -D $(DISASSEMBLY_DIR)/rootfs -F $(IMAGE_DIR)/rootfs.cpio # Disassemble binaries $(DISASSEMBLY_DIR)/%.objdump: $(IMAGE_DIR)/% | $(DISASSEMBLY_DIR) From c854da75f93ae2ed62e98ce6670224bd5ae5d491 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 23 Jan 2025 00:43:35 -0800 Subject: [PATCH 11/40] Update buildroot short instruction count --- bin/regression-wally | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/regression-wally b/bin/regression-wally index 185f03826..e52a89edb 100755 --- a/bin/regression-wally +++ b/bin/regression-wally @@ -39,7 +39,7 @@ tests = [ # Separate test for short buildroot run through OpenSBI UART output tests_buildrootshort = [ - ["buildroot", ["buildroot"], [f"+INSTR_LIMIT=1400000"], # Instruction limit gets to first OpenSBI UART output + ["buildroot", ["buildroot"], [f"+INSTR_LIMIT=1600000"], # Instruction limit gets to first OpenSBI UART output "OpenSBI v", "buildroot_uart.out"] ] From be6f1d9a2b26b60319cd618f479558f0925ebf6e Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 23 Jan 2025 00:44:38 -0800 Subject: [PATCH 12/40] Check that WALLY is set in linux Makefile --- linux/Makefile | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/linux/Makefile b/linux/Makefile index 78582ba29..58cb6c69b 100644 --- a/linux/Makefile +++ b/linux/Makefile @@ -28,7 +28,7 @@ BOOTMEM_FILE := ${LINUX_TESTVECTORS}/bootmem.bin all: check_write_permissions clean config build disassemble install dumptvs # Check if the environment variables are set correctly -check_environment: $(RISCV) +check_environment: $(RISCV) $(WALLY) ifeq ($(findstring :$(RISCV)/lib:,:$(LD_LIBRARY_PATH):),) @(echo "ERROR: Your environment variables are not set correctly." >&2 \ && echo "Make sure to source setup.sh or install buildroot using the wally-tool-chain-install.sh script." >&2 \ @@ -132,3 +132,7 @@ clean: $(RISCV): @ echo "ERROR: No $(RISCV) directory. Make sure you have installed the Wally Toolchain." @ echo "and sourced setup.sh" + +# Check if the WALLY environment variable is set +$(WALLY): + @ echo "ERROR: $$WALLY is not set. Make sure you have sourced setup.sh" From 5684ae94412dbbd85d0cd90462a613b28e3244f3 Mon Sep 17 00:00:00 2001 From: Huda-10xe Date: Wed, 29 Jan 2025 01:03:20 -0800 Subject: [PATCH 13/40] Updating MMU signal Propagation --- config/rv32gc/coverage.svh | 78 +++++++++++++++----------------- config/rv64gc/coverage.svh | 80 ++++++++++++++++----------------- sim/questa/wave.do | 21 +++++++++ testbench/common/wallyTracer.sv | 8 ++-- 4 files changed, 100 insertions(+), 87 deletions(-) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index 20bddd5c0..d4898ff64 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -13,48 +13,44 @@ `define CLINT_BASE 64'h02000000 // Unprivileged extensions -`include "I_coverage.svh" -`include "M_coverage.svh" -`include "F_coverage.svh" -`include "D_coverage.svh" -`include "Zba_coverage.svh" -`include "Zbb_coverage.svh" -`include "Zbc_coverage.svh" -`include "Zbs_coverage.svh" -`include "ZfaF_coverage.svh" -`include "ZfaD_coverage.svh" -`include "ZfaZfh_coverage.svh" -`include "Zfh_coverage.svh" -`include "ZfhD_coverage.svh" -// Note: Zfhmin is a subset of Zfh, so usually only one or the other would be used. When Zfhmin and D are supported, ZfhD should also be enabled -`include "Zfhmin_coverage.svh" -// Note: Zmmul is a subset of M, so usually only one or the other would be used. -`include "Zmmul_coverage.svh" -`include "Zicond_coverage.svh" -`include "Zca_coverage.svh" -`include "Zcb_coverage.svh" -`include "ZcbM_coverage.svh" -`include "ZcbZbb_coverage.svh" -`include "Zcf_coverage.svh" -`include "Zcd_coverage.svh" -`include "Zicsr_coverage.svh" -`include "Zbkb_coverage.svh" -`include "Zbkc_coverage.svh" -`include "Zbkx_coverage.svh" -`include "Zknd_coverage.svh" -`include "Zkne_coverage.svh" -`include "Zknh_coverage.svh" -`include "Zaamo_coverage.svh" -`include "Zalrsc_coverage.svh" +// `include "I_coverage.svh" +// `include "M_coverage.svh" +// `include "F_coverage.svh" +// `include "D_coverage.svh" +// `include "Zba_coverage.svh" +// `include "Zbb_coverage.svh" +// `include "Zbc_coverage.svh" +// `include "Zbs_coverage.svh" +// `include "ZfaF_coverage.svh" +// `include "ZfaD_coverage.svh" +// `include "ZfaZfh_coverage.svh" +// `include "Zfh_coverage.svh" +// `include "ZfhD_coverage.svh" +// `include "Zicond_coverage.svh" +// `include "Zca_coverage.svh" +// `include "Zcb_coverage.svh" +// `include "ZcbM_coverage.svh" +// `include "ZcbZbb_coverage.svh" +// `include "Zcf_coverage.svh" +// `include "Zcd_coverage.svh" +// `include "Zicsr_coverage.svh" +// `include "Zbkb_coverage.svh" +// `include "Zbkc_coverage.svh" +// `include "Zbkx_coverage.svh" +// `include "Zknd_coverage.svh" +// `include "Zkne_coverage.svh" +// `include "Zknh_coverage.svh" +// `include "Zaamo_coverage.svh" +// `include "Zalrsc_coverage.svh" // Privileged extensions -`include "ZicsrM_coverage.svh" -`include "ZicsrF_coverage.svh" -`include "ZicsrU_coverage.svh" +// `include "ZicsrM_coverage.svh" +// `include "ZicsrF_coverage.svh" +// `include "ZicsrU_coverage.svh" `include "RV32VM_coverage.svh" `include "RV32VM_PMP_coverage.svh" -`include "EndianU_coverage.svh" -`include "EndianM_coverage.svh" -`include "EndianS_coverage.svh" -`include "ExceptionsM_coverage.svh" -`include "ExceptionsZc_coverage.svh" +// `include "EndianU_coverage.svh" +// `include "EndianM_coverage.svh" +// `include "EndianS_coverage.svh" +// `include "ExceptionsM_coverage.svh" +// `include "ExceptionsZc_coverage.svh" diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index fd8f11b04..9c0045ae3 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -13,50 +13,46 @@ `define CLINT_BASE 64'h02000000 // Unprivileged extensions -`include "I_coverage.svh" -`include "M_coverage.svh" -`include "F_coverage.svh" -`include "D_coverage.svh" -`include "Zba_coverage.svh" -`include "Zbb_coverage.svh" -`include "Zbc_coverage.svh" -`include "Zbs_coverage.svh" -`include "ZfaF_coverage.svh" -`include "ZfaD_coverage.svh" -`include "ZfaZfh_coverage.svh" -`include "ZfhD_coverage.svh" -`include "Zfh_coverage.svh" -// Note: Zfhmin is a subset of Zfh, so usually only one or the other would be used. When Zfhmin and D are supported, ZfhD should also be enabled -`include "Zfhmin_coverage.svh" -// Note: Zmmul is a subset of M, so usually only one or the other would be used. -`include "Zmmul_coverage.svh" -`include "Zicond_coverage.svh" -`include "Zca_coverage.svh" -`include "Zcb_coverage.svh" -`include "ZcbM_coverage.svh" -`include "ZcbZbb_coverage.svh" -`include "ZcbZba_coverage.svh" -`include "Zcd_coverage.svh" -`include "Zicsr_coverage.svh" -`include "Zbkb_coverage.svh" -`include "Zbkc_coverage.svh" -`include "Zbkx_coverage.svh" -`include "Zknd_coverage.svh" -`include "Zkne_coverage.svh" -`include "Zknh_coverage.svh" -`include "Zaamo_coverage.svh" -`include "Zalrsc_coverage.svh" +// `include "I_coverage.svh" +// `include "M_coverage.svh" +// `include "F_coverage.svh" +// `include "D_coverage.svh" +// `include "Zba_coverage.svh" +// `include "Zbb_coverage.svh" +// `include "Zbc_coverage.svh" +// `include "Zbs_coverage.svh" +// `include "ZfaF_coverage.svh" +// `include "ZfaD_coverage.svh" +// `include "ZfaZfh_coverage.svh" +// `include "ZfhD_coverage.svh" +// `include "Zfh_coverage.svh" +// `include "Zicond_coverage.svh" +// `include "Zca_coverage.svh" +// `include "Zcb_coverage.svh" +// `include "ZcbM_coverage.svh" +// `include "ZcbZbb_coverage.svh" +// `include "ZcbZba_coverage.svh" +// `include "Zcd_coverage.svh" +// `include "Zicsr_coverage.svh" +// `include "Zbkb_coverage.svh" +// `include "Zbkc_coverage.svh" +// `include "Zbkx_coverage.svh" +// `include "Zknd_coverage.svh" +// `include "Zkne_coverage.svh" +// `include "Zknh_coverage.svh" +// `include "Zaamo_coverage.svh" +// `include "Zalrsc_coverage.svh" // Privileged extensions `include "RV64VM_coverage.svh" -`include "ZicsrM_coverage.svh" -`include "ZicsrF_coverage.svh" -`include "ZicsrU_coverage.svh" -`include "EndianU_coverage.svh" -`include "EndianM_coverage.svh" -`include "EndianS_coverage.svh" -`include "ExceptionsM_coverage.svh" -`include "ExceptionsZc_coverage.svh" -// `include "RV64VM_PMP_coverage.svh" +// `include "ZicsrM_coverage.svh" +// `include "ZicsrF_coverage.svh" +// `include "ZicsrU_coverage.svh" +// `include "EndianU_coverage.svh" +// `include "EndianM_coverage.svh" +// `include "EndianS_coverage.svh" +// `include "ExceptionsM_coverage.svh" +// `include "ExceptionsZc_coverage.svh" +`include "RV64VM_PMP_coverage.svh" // `include "RV64CBO_VM_coverage.svh" // `include "RV64CBO_PMP_coverage.svh" diff --git a/sim/questa/wave.do b/sim/questa/wave.do index ee42a7065..115a40773 100644 --- a/sim/questa/wave.do +++ b/sim/questa/wave.do @@ -1,6 +1,27 @@ onerror {resume} quietly virtual signal -install /testbench/dut/core/ifu/bpred/bpred { /testbench/dut/core/ifu/bpred/bpred/PostSpillInstrRawF[11:7]} rd quietly WaveActivateNextPane {} 0 +add wave -position insertpoint sim:/testbench/wallyTracer/PCF +add wave -position insertpoint sim:/testbench/wallyTracer/PCD +add wave -position insertpoint sim:/testbench/wallyTracer/PCE +add wave -position insertpoint sim:/testbench/wallyTracer/PCM +add wave -position insertpoint sim:/testbench/wallyTracer/PCW +add wave -position insertpoint sim:/testbench/wallyTracer/GatedStallW +add wave -position insertpoint sim:/testbench/dut/core/lsu/hptw/hptw/SelHPTW +add wave -position insertpoint sim:/testbench/wallyTracer/StallM +add wave -position insertpoint sim:/testbench/wallyTracer/StallW +add wave -position insertpoint sim:/testbench/wallyTracer/FlushW +add wave -position insertpoint sim:/testbench/wallyTracer/PTE_iF +add wave -position insertpoint sim:/testbench/wallyTracer/PTE_iD +add wave -position insertpoint sim:/testbench/wallyTracer/PTE_iE +add wave -position insertpoint sim:/testbench/wallyTracer/PTE_iM +add wave -position insertpoint sim:/testbench/wallyTracer/PTE_iW +add wave -position insertpoint sim:/testbench/wallyTracer/PageType_iM +add wave -position insertpoint sim:/testbench/wallyTracer/PageType_iW +add wave -position insertpoint sim:/testbench/wallyTracer/ExecuteAccessM +add wave -position insertpoint sim:/testbench/wallyTracer/ExecuteAccessW +add wave -position insertpoint sim:/testbench/rvvi/valid +add wave -position insertpoint sim:/testbench/rvvi/csr[0][0][834] add wave -noupdate /testbench/clk add wave -noupdate /testbench/reset add wave -noupdate /testbench/memfilename diff --git a/testbench/common/wallyTracer.sv b/testbench/common/wallyTracer.sv index 093b72de2..bfb54a54e 100644 --- a/testbench/common/wallyTracer.sv +++ b/testbench/common/wallyTracer.sv @@ -364,25 +364,25 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi); //for VM Verification flopenrc #(P.XLEN) IVAdrDReg (clk, reset, 1'b0, SelHPTW, IVAdrF, IVAdrD); //Virtual Address for IMMU // *** RT: possible bug SelHPTW probably should be ~StallD flopenrc #(P.XLEN) IVAdrEReg (clk, reset, 1'b0, ~StallE, IVAdrD, IVAdrE); //Virtual Address for IMMU - flopenrc #(P.XLEN) IVAdrMReg (clk, reset, 1'b0, ~StallM, IVAdrE, IVAdrM); //Virtual Address for IMMU + flopenrc #(P.XLEN) IVAdrMReg (clk, reset, 1'b0, ~(StallM & ~SelHPTW), IVAdrE, IVAdrM); //Virtual Address for IMMU flopenrc #(P.XLEN) IVAdrWReg (clk, reset, 1'b0, SelHPTW, IVAdrM, IVAdrW); //Virtual Address for IMMU // *** RT: possible bug SelHPTW probably should be ~GatedStallW flopenrc #(P.XLEN) DVAdrWReg (clk, reset, 1'b0, SelHPTW, DVAdrM, DVAdrW); //Virtual Address for DMMU // *** RT: possible bug SelHPTW probably should be ~GatedStallW flopenrc #(P.PA_BITS) IPADReg (clk, reset, 1'b0, SelHPTW, IPAF, IPAD); //Physical Address for IMMU // *** RT: possible bug SelHPTW probably should be ~StallD flopenrc #(P.PA_BITS) IPAEReg (clk, reset, 1'b0, ~StallE, IPAD, IPAE); //Physical Address for IMMU - flopenrc #(P.PA_BITS) IPAMReg (clk, reset, 1'b0, ~StallM, IPAE, IPAM); //Physical Address for IMMU + flopenrc #(P.PA_BITS) IPAMReg (clk, reset, 1'b0, ~(StallM & ~SelHPTW), IPAE, IPAM); //Physical Address for IMMU flopenrc #(P.PA_BITS) IPAWReg (clk, reset, 1'b0, SelHPTW, IPAM, IPAW); //Physical Address for IMMU // *** RT: possible bug SelHPTW probably should be ~GatedStallW flopenrc #(P.PA_BITS) DPAWReg (clk, reset, 1'b0, SelHPTW, DPAM, DPAW); //Physical Address for DMMU // *** RT: possible bug SelHPTW probably should be ~GatedStallW flopenrc #(P.XLEN) IPTEDReg (clk, reset, 1'b0, SelHPTW, IPTEF, IPTED); //PTE for IMMU // *** RT: possible bug SelHPTW probably should be ~StallD flopenrc #(P.XLEN) IPTEEReg (clk, reset, 1'b0, ~StallE, IPTED, IPTEE); //PTE for IMMU - flopenrc #(P.XLEN) IPTEMReg (clk, reset, 1'b0, ~StallM, IPTEE, IPTEM); //PTE for IMMU + flopenrc #(P.XLEN) IPTEMReg (clk, reset, 1'b0, ~(StallM & ~SelHPTW), IPTEE, IPTEM); //PTE for IMMU flopenrc #(P.XLEN) IPTEWReg (clk, reset, 1'b0, SelHPTW, IPTEM, IPTEW); //PTE for IMMU // *** RT: possible bug SelHPTW probably should be ~GatedStallW flopenrc #(P.XLEN) DPTEWReg (clk, reset, 1'b0, SelHPTW, DPTEM, DPTEW); //PTE for DMMU // *** RT: possible bug SelHPTW probably should be ~GatedStallW flopenrc #(2) IPageTypeDReg (clk, reset, 1'b0, SelHPTW, IPageTypeF, IPageTypeD); //PageType (kilo, mega, giga, tera) from IMMU // *** RT: possible bug SelHPTW probably should be ~StallD flopenrc #(2) IPageTypeEReg (clk, reset, 1'b0, ~StallE, IPageTypeD, IPageTypeE); //PageType (kilo, mega, giga, tera) from IMMU - flopenrc #(2) IPageTypeMReg (clk, reset, 1'b0, ~StallM, IPageTypeE, IPageTypeM); //PageType (kilo, mega, giga, tera) from IMMU + flopenrc #(2) IPageTypeMReg (clk, reset, 1'b0, ~(StallM & ~SelHPTW), IPageTypeE, IPageTypeM); //PageType (kilo, mega, giga, tera) from IMMU flopenrc #(2) IPageTypeWReg (clk, reset, 1'b0, SelHPTW, IPageTypeM, IPageTypeW); //PageType (kilo, mega, giga, tera) from IMMU // *** RT: possible bug SelHPTW probably should be ~GatedStallW flopenrc #(2) DPageTypeWReg (clk, reset, 1'b0, SelHPTW, DPageTypeM, DPageTypeW); //PageType (kilo, mega, giga, tera) from DMMU // *** RT: possible bug SelHPTW probably should be ~GatedStallW From 54fd684d942a44715cfc387ee2eaa84e7385a4d6 Mon Sep 17 00:00:00 2001 From: Huda-10xe Date: Wed, 29 Jan 2025 01:08:30 -0800 Subject: [PATCH 14/40] Restoring files --- config/rv32gc/coverage.svh | 78 +++++++++++++++++++------------------ config/rv64gc/coverage.svh | 80 ++++++++++++++++++++------------------ sim/questa/wave.do | 21 ---------- 3 files changed, 83 insertions(+), 96 deletions(-) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index d4898ff64..20bddd5c0 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -13,44 +13,48 @@ `define CLINT_BASE 64'h02000000 // Unprivileged extensions -// `include "I_coverage.svh" -// `include "M_coverage.svh" -// `include "F_coverage.svh" -// `include "D_coverage.svh" -// `include "Zba_coverage.svh" -// `include "Zbb_coverage.svh" -// `include "Zbc_coverage.svh" -// `include "Zbs_coverage.svh" -// `include "ZfaF_coverage.svh" -// `include "ZfaD_coverage.svh" -// `include "ZfaZfh_coverage.svh" -// `include "Zfh_coverage.svh" -// `include "ZfhD_coverage.svh" -// `include "Zicond_coverage.svh" -// `include "Zca_coverage.svh" -// `include "Zcb_coverage.svh" -// `include "ZcbM_coverage.svh" -// `include "ZcbZbb_coverage.svh" -// `include "Zcf_coverage.svh" -// `include "Zcd_coverage.svh" -// `include "Zicsr_coverage.svh" -// `include "Zbkb_coverage.svh" -// `include "Zbkc_coverage.svh" -// `include "Zbkx_coverage.svh" -// `include "Zknd_coverage.svh" -// `include "Zkne_coverage.svh" -// `include "Zknh_coverage.svh" -// `include "Zaamo_coverage.svh" -// `include "Zalrsc_coverage.svh" +`include "I_coverage.svh" +`include "M_coverage.svh" +`include "F_coverage.svh" +`include "D_coverage.svh" +`include "Zba_coverage.svh" +`include "Zbb_coverage.svh" +`include "Zbc_coverage.svh" +`include "Zbs_coverage.svh" +`include "ZfaF_coverage.svh" +`include "ZfaD_coverage.svh" +`include "ZfaZfh_coverage.svh" +`include "Zfh_coverage.svh" +`include "ZfhD_coverage.svh" +// Note: Zfhmin is a subset of Zfh, so usually only one or the other would be used. When Zfhmin and D are supported, ZfhD should also be enabled +`include "Zfhmin_coverage.svh" +// Note: Zmmul is a subset of M, so usually only one or the other would be used. +`include "Zmmul_coverage.svh" +`include "Zicond_coverage.svh" +`include "Zca_coverage.svh" +`include "Zcb_coverage.svh" +`include "ZcbM_coverage.svh" +`include "ZcbZbb_coverage.svh" +`include "Zcf_coverage.svh" +`include "Zcd_coverage.svh" +`include "Zicsr_coverage.svh" +`include "Zbkb_coverage.svh" +`include "Zbkc_coverage.svh" +`include "Zbkx_coverage.svh" +`include "Zknd_coverage.svh" +`include "Zkne_coverage.svh" +`include "Zknh_coverage.svh" +`include "Zaamo_coverage.svh" +`include "Zalrsc_coverage.svh" // Privileged extensions -// `include "ZicsrM_coverage.svh" -// `include "ZicsrF_coverage.svh" -// `include "ZicsrU_coverage.svh" +`include "ZicsrM_coverage.svh" +`include "ZicsrF_coverage.svh" +`include "ZicsrU_coverage.svh" `include "RV32VM_coverage.svh" `include "RV32VM_PMP_coverage.svh" -// `include "EndianU_coverage.svh" -// `include "EndianM_coverage.svh" -// `include "EndianS_coverage.svh" -// `include "ExceptionsM_coverage.svh" -// `include "ExceptionsZc_coverage.svh" +`include "EndianU_coverage.svh" +`include "EndianM_coverage.svh" +`include "EndianS_coverage.svh" +`include "ExceptionsM_coverage.svh" +`include "ExceptionsZc_coverage.svh" diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index 9c0045ae3..fd8f11b04 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -13,46 +13,50 @@ `define CLINT_BASE 64'h02000000 // Unprivileged extensions -// `include "I_coverage.svh" -// `include "M_coverage.svh" -// `include "F_coverage.svh" -// `include "D_coverage.svh" -// `include "Zba_coverage.svh" -// `include "Zbb_coverage.svh" -// `include "Zbc_coverage.svh" -// `include "Zbs_coverage.svh" -// `include "ZfaF_coverage.svh" -// `include "ZfaD_coverage.svh" -// `include "ZfaZfh_coverage.svh" -// `include "ZfhD_coverage.svh" -// `include "Zfh_coverage.svh" -// `include "Zicond_coverage.svh" -// `include "Zca_coverage.svh" -// `include "Zcb_coverage.svh" -// `include "ZcbM_coverage.svh" -// `include "ZcbZbb_coverage.svh" -// `include "ZcbZba_coverage.svh" -// `include "Zcd_coverage.svh" -// `include "Zicsr_coverage.svh" -// `include "Zbkb_coverage.svh" -// `include "Zbkc_coverage.svh" -// `include "Zbkx_coverage.svh" -// `include "Zknd_coverage.svh" -// `include "Zkne_coverage.svh" -// `include "Zknh_coverage.svh" -// `include "Zaamo_coverage.svh" -// `include "Zalrsc_coverage.svh" +`include "I_coverage.svh" +`include "M_coverage.svh" +`include "F_coverage.svh" +`include "D_coverage.svh" +`include "Zba_coverage.svh" +`include "Zbb_coverage.svh" +`include "Zbc_coverage.svh" +`include "Zbs_coverage.svh" +`include "ZfaF_coverage.svh" +`include "ZfaD_coverage.svh" +`include "ZfaZfh_coverage.svh" +`include "ZfhD_coverage.svh" +`include "Zfh_coverage.svh" +// Note: Zfhmin is a subset of Zfh, so usually only one or the other would be used. When Zfhmin and D are supported, ZfhD should also be enabled +`include "Zfhmin_coverage.svh" +// Note: Zmmul is a subset of M, so usually only one or the other would be used. +`include "Zmmul_coverage.svh" +`include "Zicond_coverage.svh" +`include "Zca_coverage.svh" +`include "Zcb_coverage.svh" +`include "ZcbM_coverage.svh" +`include "ZcbZbb_coverage.svh" +`include "ZcbZba_coverage.svh" +`include "Zcd_coverage.svh" +`include "Zicsr_coverage.svh" +`include "Zbkb_coverage.svh" +`include "Zbkc_coverage.svh" +`include "Zbkx_coverage.svh" +`include "Zknd_coverage.svh" +`include "Zkne_coverage.svh" +`include "Zknh_coverage.svh" +`include "Zaamo_coverage.svh" +`include "Zalrsc_coverage.svh" // Privileged extensions `include "RV64VM_coverage.svh" -// `include "ZicsrM_coverage.svh" -// `include "ZicsrF_coverage.svh" -// `include "ZicsrU_coverage.svh" -// `include "EndianU_coverage.svh" -// `include "EndianM_coverage.svh" -// `include "EndianS_coverage.svh" -// `include "ExceptionsM_coverage.svh" -// `include "ExceptionsZc_coverage.svh" -`include "RV64VM_PMP_coverage.svh" +`include "ZicsrM_coverage.svh" +`include "ZicsrF_coverage.svh" +`include "ZicsrU_coverage.svh" +`include "EndianU_coverage.svh" +`include "EndianM_coverage.svh" +`include "EndianS_coverage.svh" +`include "ExceptionsM_coverage.svh" +`include "ExceptionsZc_coverage.svh" +// `include "RV64VM_PMP_coverage.svh" // `include "RV64CBO_VM_coverage.svh" // `include "RV64CBO_PMP_coverage.svh" diff --git a/sim/questa/wave.do b/sim/questa/wave.do index 115a40773..ee42a7065 100644 --- a/sim/questa/wave.do +++ b/sim/questa/wave.do @@ -1,27 +1,6 @@ onerror {resume} quietly virtual signal -install /testbench/dut/core/ifu/bpred/bpred { /testbench/dut/core/ifu/bpred/bpred/PostSpillInstrRawF[11:7]} rd quietly WaveActivateNextPane {} 0 -add wave -position insertpoint sim:/testbench/wallyTracer/PCF -add wave -position insertpoint sim:/testbench/wallyTracer/PCD -add wave -position insertpoint sim:/testbench/wallyTracer/PCE -add wave -position insertpoint sim:/testbench/wallyTracer/PCM -add wave -position insertpoint sim:/testbench/wallyTracer/PCW -add wave -position insertpoint sim:/testbench/wallyTracer/GatedStallW -add wave -position insertpoint sim:/testbench/dut/core/lsu/hptw/hptw/SelHPTW -add wave -position insertpoint sim:/testbench/wallyTracer/StallM -add wave -position insertpoint sim:/testbench/wallyTracer/StallW -add wave -position insertpoint sim:/testbench/wallyTracer/FlushW -add wave -position insertpoint sim:/testbench/wallyTracer/PTE_iF -add wave -position insertpoint sim:/testbench/wallyTracer/PTE_iD -add wave -position insertpoint sim:/testbench/wallyTracer/PTE_iE -add wave -position insertpoint sim:/testbench/wallyTracer/PTE_iM -add wave -position insertpoint sim:/testbench/wallyTracer/PTE_iW -add wave -position insertpoint sim:/testbench/wallyTracer/PageType_iM -add wave -position insertpoint sim:/testbench/wallyTracer/PageType_iW -add wave -position insertpoint sim:/testbench/wallyTracer/ExecuteAccessM -add wave -position insertpoint sim:/testbench/wallyTracer/ExecuteAccessW -add wave -position insertpoint sim:/testbench/rvvi/valid -add wave -position insertpoint sim:/testbench/rvvi/csr[0][0][834] add wave -noupdate /testbench/clk add wave -noupdate /testbench/reset add wave -noupdate /testbench/memfilename From 46ef44de5da6b033e68b6c6b272c624bbb22cc85 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 30 Jan 2025 00:58:53 -0800 Subject: [PATCH 15/40] Update breker and enable interrupts --- site-setup.sh | 2 +- testbench/trek_files/platform.yaml | 6 +++++- tests/breker/Makefile | 2 +- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/site-setup.sh b/site-setup.sh index 81f17fff2..8bcd3d96e 100755 --- a/site-setup.sh +++ b/site-setup.sh @@ -15,7 +15,7 @@ export IMPERASD_LICENSE_FILE=27020@zircon.eng.hmc.edu # Change thi export QUESTA_HOME=/cad/mentor/questa_sim-2023.4/questasim # Change this for your path to Questa, excluding bin export DC_HOME=/cad/synopsys/SYN # Change this for your path to Synopsys DC, excluding bin export VCS_HOME=/cad/synopsys/vcs/U-2023.03-SP2-4 # Change this for your path to Synopsys VCS, excluding bin -export BREKER_HOME=/cad/breker/trek5-2.1.10b-GCC6_el7 # Change this for your path to Breker Trek +export BREKER_HOME=/cad/breker/trek5-2.1.11-GCC6_el7 # Change this for your path to Breker Trek # Tools # Questa and Synopsys diff --git a/testbench/trek_files/platform.yaml b/testbench/trek_files/platform.yaml index d7f7b8dad..c5b201342 100644 --- a/testbench/trek_files/platform.yaml +++ b/testbench/trek_files/platform.yaml @@ -154,7 +154,11 @@ trek: doc: >- Verbatim code that will be put into the header section of the test. value: |- - + // enable mtimer interrupts + #define TREK_MTIME_BASE (0x0200bff8) + #define TREK_MTIMECMP_BASE (0x02004000) + #define TREK_MSWI_BASE (0x02000000) + #define TREK_MTIMECMP_DELAY 0x1000 declaration: doc: >- Verbatim code that will be put into the declaration section of the test. diff --git a/tests/breker/Makefile b/tests/breker/Makefile index fc56d8805..e21b6b3d5 100644 --- a/tests/breker/Makefile +++ b/tests/breker/Makefile @@ -14,7 +14,7 @@ TREKSVIP := source $(TREKFILES)/breker-setup.sh && treksvip -p $(PLATFOR # Compilation paths and variables START_LIB_DIR := $(WALLY)/examples/C/common START_LIB := $(START_LIB_DIR)/crt.S $(START_LIB_DIR)/syscalls.c -MARCH :=-march=rv64gc_zcb_zfa_zba_zbb_zbc_zbs_zfh_zicboz_zicbop_zicbom_zbkb_zbkx_zknd_zkne_zknh_svinval +MARCH :=-march=rv64gc_zcb_zfa_zba_zbb_zbc_zbs_zfh_zicboz_zicbop_zicbom_zicond_zbkb_zbkx_zknd_zkne_zknh_svinval MABI :=-mabi=lp64d LINKER := $(START_LIB_DIR)/test.ld LINK_FLAGS := -nostartfiles From d28bca7306267c8d0c7e3a8158a2c21a2be6a4d8 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 12 Jan 2025 22:06:33 -0800 Subject: [PATCH 16/40] Fix buildroot when launched from install script --- bin/wally-tool-chain-install.sh | 2 ++ 1 file changed, 2 insertions(+) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index 35578d008..c032e899f 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -126,6 +126,8 @@ fi # Determine script directory to locate related scripts dir="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)" +WALLY=$(dirname "$dir") +export WALLY # Get Linux distro and version source "${dir}"/wally-distro-check.sh From b3796fc81094b7bb21be46f847a9040ee0b8d41f Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Mon, 13 Jan 2025 10:56:06 -0800 Subject: [PATCH 17/40] Allow buildroot to be compiled as root --- bin/wally-tool-chain-install.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index c032e899f..11da9d3d0 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -473,7 +473,7 @@ if [ ! "$no_buidroot" ]; then fi cd "$dir"/../linux if [ ! -e "$RISCV"/buildroot ]; then - make 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + FORCE_UNSAFE_CONFIGURE=1 make 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] echo -e "${SUCCESS_COLOR}Buildroot successfully installed and Linux testvectors created!${ENDC}" elif [ ! -e "$RISCV"/linux-testvectors ]; then echo -e "${OK_COLOR}Buildroot already exists, but Linux testvectors are missing. Generating them now.${ENDC}" From af99d2cd80f0f532a835ca56413c4e97bb04760d Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 16 Jan 2025 22:14:43 -0800 Subject: [PATCH 18/40] Add comment explaining FORCE_UNSAFE_CONFIGURE [skip ci] --- bin/wally-tool-chain-install.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index 11da9d3d0..dbe60a007 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -473,7 +473,7 @@ if [ ! "$no_buidroot" ]; then fi cd "$dir"/../linux if [ ! -e "$RISCV"/buildroot ]; then - FORCE_UNSAFE_CONFIGURE=1 make 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + FORCE_UNSAFE_CONFIGURE=1 make 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] # FORCE_UNSAFE_CONFIGURE is needed to allow buildroot to compile when run as root echo -e "${SUCCESS_COLOR}Buildroot successfully installed and Linux testvectors created!${ENDC}" elif [ ! -e "$RISCV"/linux-testvectors ]; then echo -e "${OK_COLOR}Buildroot already exists, but Linux testvectors are missing. Generating them now.${ENDC}" From 1ba9fe6aa3a37e71c04c17266cf82234ecf10d53 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Mon, 27 Jan 2025 08:49:04 -0800 Subject: [PATCH 19/40] Update sail model to build with cmake --- bin/wally-tool-chain-install.sh | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index dbe60a007..8fe98569d 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -428,13 +428,13 @@ fi # The RISC-V Sail Model is the golden reference model for RISC-V. It is written in Sail (described above) section_header "Installing/Updating RISC-V Sail Model" STATUS="riscv-sail-model" -if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/riscv_sim_RV32"; then +if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/riscv_sim_rv32d"; then cd "$RISCV"/sail-riscv - git reset --hard && git clean -f && git checkout master && git pull - ARCH=RV64 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV64 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] - ARCH=RV32 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV32 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] - cp -f c_emulator/riscv_sim_RV64 "$RISCV"/bin/riscv_sim_RV64 - cp -f c_emulator/riscv_sim_RV32 "$RISCV"/bin/riscv_sim_RV32 + git reset --hard && git clean -f && git checkout master && git pull && rm -rf build + cmake -S . -B build -DCMAKE_RELEASE_TYPE=RelWithDebInfo -GNinja 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + cmake --build build 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + cp -f build/c_emulator/riscv_sim_rv64d "$RISCV"/bin/riscv_sim_rv64d + cp -f build/c_emulator/riscv_sim_rv32d "$RISCV"/bin/riscv_sim_rv32d if [ "$clean" ]; then cd "$RISCV" rm -rf sail-riscv From 3c74f37e594a3e51f8d7956097a161cccd98a336 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Mon, 27 Jan 2025 08:49:20 -0800 Subject: [PATCH 20/40] Update name of sail executables --- tests/riscof/sail_cSim/riscof_sail_cSim.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/riscof/sail_cSim/riscof_sail_cSim.py b/tests/riscof/sail_cSim/riscof_sail_cSim.py index e739af411..54e6b77d2 100644 --- a/tests/riscof/sail_cSim/riscof_sail_cSim.py +++ b/tests/riscof/sail_cSim/riscof_sail_cSim.py @@ -21,8 +21,8 @@ class sail_cSim(pluginTemplate): raise SystemExit(1) self.num_jobs = str(config['jobs'] if 'jobs' in config else 1) self.pluginpath = os.path.abspath(config['pluginpath']) - self.sail_exe = { '32' : os.path.join(config['PATH'] if 'PATH' in config else "","riscv_sim_RV32"), - '64' : os.path.join(config['PATH'] if 'PATH' in config else "","riscv_sim_RV64")} + self.sail_exe = { '32' : os.path.join(config['PATH'] if 'PATH' in config else "","riscv_sim_rv32d"), + '64' : os.path.join(config['PATH'] if 'PATH' in config else "","riscv_sim_rv64d")} self.isa_spec = os.path.abspath(config['ispec']) if 'ispec' in config else '' self.platform_spec = os.path.abspath(config['pspec']) if 'ispec' in config else '' self.make = config['make'] if 'make' in config else 'make' From 256fafc4fb8ea9f1f5531049a24c87885cc520fe Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Mon, 27 Jan 2025 21:34:07 -0800 Subject: [PATCH 21/40] Fix sail install --- bin/wally-tool-chain-install.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index 8fe98569d..0018cafc4 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -430,7 +430,7 @@ section_header "Installing/Updating RISC-V Sail Model" STATUS="riscv-sail-model" if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/riscv_sim_rv32d"; then cd "$RISCV"/sail-riscv - git reset --hard && git clean -f && git checkout master && git pull && rm -rf build + git reset --hard && git clean -f && git checkout master && git pull cmake -S . -B build -DCMAKE_RELEASE_TYPE=RelWithDebInfo -GNinja 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] cmake --build build 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] cp -f build/c_emulator/riscv_sim_rv64d "$RISCV"/bin/riscv_sim_rv64d From 8d01b46a05a6030e54843b50bb02d24e3297d138 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 30 Jan 2025 07:57:22 -0800 Subject: [PATCH 22/40] Fix typo --- bin/wally-tool-chain-install.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index 0018cafc4..413a7953b 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -431,7 +431,7 @@ STATUS="riscv-sail-model" if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/riscv_sim_rv32d"; then cd "$RISCV"/sail-riscv git reset --hard && git clean -f && git checkout master && git pull - cmake -S . -B build -DCMAKE_RELEASE_TYPE=RelWithDebInfo -GNinja 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + cmake -S . -B build -DCMAKE_BUILD_TYPE=RelWithDebInfo -GNinja 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] cmake --build build 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] cp -f build/c_emulator/riscv_sim_rv64d "$RISCV"/bin/riscv_sim_rv64d cp -f build/c_emulator/riscv_sim_rv32d "$RISCV"/bin/riscv_sim_rv32d From 31bfcdc660b2fb1a8c5c0206a68de91b60f7aa58 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 30 Jan 2025 13:29:32 -0800 Subject: [PATCH 23/40] Update CI to ensure sufficient space --- .github/scripts/cli-create-lvm.sh | 64 ++++++++++++++++++++++ .github/{ => scripts}/cli-space-cleanup.sh | 0 .github/workflows/install.yml | 16 +++--- 3 files changed, 73 insertions(+), 7 deletions(-) create mode 100755 .github/scripts/cli-create-lvm.sh rename .github/{ => scripts}/cli-space-cleanup.sh (100%) diff --git a/.github/scripts/cli-create-lvm.sh b/.github/scripts/cli-create-lvm.sh new file mode 100755 index 000000000..a28fbe27d --- /dev/null +++ b/.github/scripts/cli-create-lvm.sh @@ -0,0 +1,64 @@ +#!/bin/bash +########################################### +## GitHub runner create LVM volume merging /mnt with / for more space +## +## Written: Jordan Carlin, jcarlin@hmc.edu +## Created: 30 Jan 2025 +## Based on https://github.com/easimon/maximize-build-space/blob/master/action.yml +## +## Purpose: Combine free space from multiple disks into a single logical volume for GitHub Actions runner +## A component of the CORE-V-WALLY configurable RISC-V project. +## https://github.com/openhwgroup/cvw +## +## Copyright (C) 2021-25 Harvey Mudd College & Oklahoma State University +## +## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 +## +## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file +## except in compliance with the License, or, at your option, the Apache License version 2.0. You +## may obtain a copy of the License at +## +## https:##solderpad.org/licenses/SHL-2.1/ +## +## Unless required by applicable law or agreed to in writing, any work distributed under the +## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +## either express or implied. See the License for the specific language governing permissions +## and limitations under the License. +################################################################################################ + +ROOT_SAVE_SPACE="${1:-20}" # in GB, needed for installing packages, etc. +MOUNT="${2:-$GITHUB_WORKSPACE}" + +# First disable and remove swap file on /mnt +sudo swapoff -a +sudo rm -f /mnt/swapfile + +# Create / LVM physical volume +ROOT_FREE_SPACE=$(df --block-size=1024 --output=avail / | tail -1) +ROOT_LVM_SIZE=$(((ROOT_FREE_SPACE - (ROOT_SAVE_SPACE * 1024 * 1024)) * 1024)) +sudo touch /pv.img && sudo fallocate -z -l $ROOT_LVM_SIZE /pv.img +ROOT_LOOP_DEV=$(sudo losetup --find --show /pv.img) +sudo pvcreate -f "$ROOT_LOOP_DEV" + +# Create /mnt LVM physical volume +MNT_FREE_SPACE=$(df --block-size=1024 --output=avail /mnt | tail -1) +MNT_LVM_SIZE=$(((MNT_FREE_SPACE - (1 * 1024)) * 1024)) # Leave 1MB free on /mnt +sudo touch /mnt/pv.img && sudo fallocate -z -l $MNT_LVM_SIZE /mnt/pv.img +MNT_LOOP_DEV=$(sudo losetup --find --show /mnt/pv.img) +sudo pvcreate -f "$MNT_LOOP_DEV" + +# Create LVM volume group +sudo vgcreate runnervg "$ROOT_LOOP_DEV" "$MNT_LOOP_DEV" + +# Recreate swap +sudo lvcreate -L 4G -n swap runnervg +sudo mkswap /dev/mapper/runnervg-swap +sudo swapon /dev/mapper/runnervg-swap + +# Create LVM logical volume +sudo lvcreate -l 100%FREE -n runnerlv runnervg +sudo mkfs.ext4 /dev/mapper/runnervg-runnerlv +sudo mkdir -p "$MOUNT" +sudo mount /dev/mapper/runnervg-runnerlv "$MOUNT" +sudo chown runner:runner "$MOUNT" +sudo rm -rf "$MOUNT/lost+found" diff --git a/.github/cli-space-cleanup.sh b/.github/scripts/cli-space-cleanup.sh similarity index 100% rename from .github/cli-space-cleanup.sh rename to .github/scripts/cli-space-cleanup.sh diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index 10e36cbab..00d72ee50 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -127,9 +127,11 @@ jobs: run: | df -h if [ -z ${{ matrix.image }} ]; then - ./.github/cli-space-cleanup.sh + ./.github/scripts/cli-space-cleanup.sh + ./.github/scripts/cli-create-lvm.sh else - nsenter -t 1 -m -u -n -i bash -c "$(cat .github/cli-space-cleanup.sh)" + nsenter -t 1 -m -u -n -i bash -c "$(cat .github/scripts/cli-space-cleanup.sh)" + nsenter -t 1 -m -u -n -i bash -c "$(cat .github/scripts/cli-create-lvm.sh)" fi df -h # Run main tool chain installation script, either as a user or system wide @@ -159,16 +161,16 @@ jobs: with: name: installation-logs-${{ matrix.name }} path: ${{ env.RISCV }}/logs/ + # Only the linux-testvectors are needed, so remove the rest of the buildroot to save space + - name: Remove Buildroot to Save Space + run: | + rm -rf $RISCV/buildroot/ || sudo rm -rf $RISCV/ + df -h # Make riscof and zsbl only as that is the only testsuite used by standard regression - name: make tests run: | source setup.sh make riscof zsbl --jobs $(nproc --ignore 1) - # Only the linux-testvectors are needed, so remove the rest of the buildroot to save space - - name: Remove Buildroot to Save Space - run: | - rm -rf $RISCV/buildroot/output/build || sudo rm -rf $RISCV/buildroot/output/build - df -h # Run standard regression, skipping distros that are known to be broken with Verilator - name: Regression if: ${{ matrix.regressionFail != true }} From c99f11a5a220431802a96f44247c5cae2cced59f Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 30 Jan 2025 13:32:58 -0800 Subject: [PATCH 24/40] Reorder installation CI for better space usage --- .github/workflows/install.yml | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index 00d72ee50..fc6363a4d 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -128,10 +128,10 @@ jobs: df -h if [ -z ${{ matrix.image }} ]; then ./.github/scripts/cli-space-cleanup.sh - ./.github/scripts/cli-create-lvm.sh + #./.github/scripts/cli-create-lvm.sh else nsenter -t 1 -m -u -n -i bash -c "$(cat .github/scripts/cli-space-cleanup.sh)" - nsenter -t 1 -m -u -n -i bash -c "$(cat .github/scripts/cli-create-lvm.sh)" + #nsenter -t 1 -m -u -n -i bash -c "$(cat .github/scripts/cli-create-lvm.sh)" fi df -h # Run main tool chain installation script, either as a user or system wide @@ -162,9 +162,11 @@ jobs: name: installation-logs-${{ matrix.name }} path: ${{ env.RISCV }}/logs/ # Only the linux-testvectors are needed, so remove the rest of the buildroot to save space - - name: Remove Buildroot to Save Space + # Logs have already been uploaded so they can be removed + - name: Clean up installation run: | - rm -rf $RISCV/buildroot/ || sudo rm -rf $RISCV/ + rm -rf $RISCV/buildroot/ || sudo rm -rf $RISCV/buildroot/ + rm -rf $RISCV/logs || sudo rm -rf $RISCV/logs df -h # Make riscof and zsbl only as that is the only testsuite used by standard regression - name: make tests From e5992ad4f7d98a4a4cf28c94bcbded03f184bc01 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 30 Jan 2025 19:17:04 -0800 Subject: [PATCH 25/40] Cleanup --- .github/scripts/cli-create-lvm.sh | 64 ------------------------------- .github/workflows/install.yml | 2 - 2 files changed, 66 deletions(-) delete mode 100755 .github/scripts/cli-create-lvm.sh diff --git a/.github/scripts/cli-create-lvm.sh b/.github/scripts/cli-create-lvm.sh deleted file mode 100755 index a28fbe27d..000000000 --- a/.github/scripts/cli-create-lvm.sh +++ /dev/null @@ -1,64 +0,0 @@ -#!/bin/bash -########################################### -## GitHub runner create LVM volume merging /mnt with / for more space -## -## Written: Jordan Carlin, jcarlin@hmc.edu -## Created: 30 Jan 2025 -## Based on https://github.com/easimon/maximize-build-space/blob/master/action.yml -## -## Purpose: Combine free space from multiple disks into a single logical volume for GitHub Actions runner -## A component of the CORE-V-WALLY configurable RISC-V project. -## https://github.com/openhwgroup/cvw -## -## Copyright (C) 2021-25 Harvey Mudd College & Oklahoma State University -## -## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 -## -## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file -## except in compliance with the License, or, at your option, the Apache License version 2.0. You -## may obtain a copy of the License at -## -## https:##solderpad.org/licenses/SHL-2.1/ -## -## Unless required by applicable law or agreed to in writing, any work distributed under the -## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, -## either express or implied. See the License for the specific language governing permissions -## and limitations under the License. -################################################################################################ - -ROOT_SAVE_SPACE="${1:-20}" # in GB, needed for installing packages, etc. -MOUNT="${2:-$GITHUB_WORKSPACE}" - -# First disable and remove swap file on /mnt -sudo swapoff -a -sudo rm -f /mnt/swapfile - -# Create / LVM physical volume -ROOT_FREE_SPACE=$(df --block-size=1024 --output=avail / | tail -1) -ROOT_LVM_SIZE=$(((ROOT_FREE_SPACE - (ROOT_SAVE_SPACE * 1024 * 1024)) * 1024)) -sudo touch /pv.img && sudo fallocate -z -l $ROOT_LVM_SIZE /pv.img -ROOT_LOOP_DEV=$(sudo losetup --find --show /pv.img) -sudo pvcreate -f "$ROOT_LOOP_DEV" - -# Create /mnt LVM physical volume -MNT_FREE_SPACE=$(df --block-size=1024 --output=avail /mnt | tail -1) -MNT_LVM_SIZE=$(((MNT_FREE_SPACE - (1 * 1024)) * 1024)) # Leave 1MB free on /mnt -sudo touch /mnt/pv.img && sudo fallocate -z -l $MNT_LVM_SIZE /mnt/pv.img -MNT_LOOP_DEV=$(sudo losetup --find --show /mnt/pv.img) -sudo pvcreate -f "$MNT_LOOP_DEV" - -# Create LVM volume group -sudo vgcreate runnervg "$ROOT_LOOP_DEV" "$MNT_LOOP_DEV" - -# Recreate swap -sudo lvcreate -L 4G -n swap runnervg -sudo mkswap /dev/mapper/runnervg-swap -sudo swapon /dev/mapper/runnervg-swap - -# Create LVM logical volume -sudo lvcreate -l 100%FREE -n runnerlv runnervg -sudo mkfs.ext4 /dev/mapper/runnervg-runnerlv -sudo mkdir -p "$MOUNT" -sudo mount /dev/mapper/runnervg-runnerlv "$MOUNT" -sudo chown runner:runner "$MOUNT" -sudo rm -rf "$MOUNT/lost+found" diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index fc6363a4d..3cf9fd041 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -128,10 +128,8 @@ jobs: df -h if [ -z ${{ matrix.image }} ]; then ./.github/scripts/cli-space-cleanup.sh - #./.github/scripts/cli-create-lvm.sh else nsenter -t 1 -m -u -n -i bash -c "$(cat .github/scripts/cli-space-cleanup.sh)" - #nsenter -t 1 -m -u -n -i bash -c "$(cat .github/scripts/cli-create-lvm.sh)" fi df -h # Run main tool chain installation script, either as a user or system wide From 057823d61f747832cffb7b136ac074285e0ba69f Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 30 Jan 2025 19:40:16 -0800 Subject: [PATCH 26/40] Install newer cmake on old debian and ubuntu --- bin/wally-tool-chain-install.sh | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index 413a7953b..2c6db771c 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -286,6 +286,21 @@ if (( UBUNTU_VERSION == 20 || DEBIAN_VERSION == 11 )) || [ "$FAMILY" == suse ]; fi fi +# Newer version of CMake needed to build sail-riscv model (at least 3.20) +if (( UBUNTU_VERSION == 20 || DEBIAN_VERSION == 11 )); then + STATUS="cmake" + if [ ! -e "$RISCV"/bin/cmake ]; then + section_header "Installing cmake" + cd "$RISCV" + wget -nv --retry-connrefused $retry_on_host_error --output-document=cmake.tar.gz https://github.com/Kitware/CMake/releases/download/v3.31.5/cmake-3.31.5-linux-x86_64.tar.gz + tar xz --directory="$RISCV" --strip-components=1 -f cmake.tar.gz + rm -f cmake.tar.gz + echo -e "${SUCCESS_COLOR}CMake successfully installed/updated!${ENDC}" + else + echo -e "${SUCCESS_COLOR}CMake already installed.${ENDC}" + fi +fi + # RISC-V GNU Toolchain (https://github.com/riscv-collab/riscv-gnu-toolchain) # The RISC-V GNU Toolchain includes the GNU Compiler Collection (gcc), GNU Binutils, Newlib, # and the GNU Debugger Project (gdb). It is a collection of tools used to compile RISC-V programs. From d475f64f99d8b27212574e0c5a8241b377e09e4e Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 30 Jan 2025 19:40:40 -0800 Subject: [PATCH 27/40] Cleanup installation logging --- bin/wally-tool-chain-install.sh | 46 ++++++++++++++++----------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index 2c6db771c..9ffddf8bc 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -99,7 +99,7 @@ git_check() { # Log output to a file and only print lines with keywords logger() { - local log_file="$RISCV/logs/$1.log" + local log_file="$RISCV/logs/$STATUS.log" local keyword_pattern="(\bwarning|\berror|\bfail|\bsuccess|\bstamp|\bdoesn't work)" local exclude_pattern="(_warning|warning_|_error|error_|-warning|warning-|-error|error-|Werror|error\.o|warning flags)" @@ -183,7 +183,7 @@ echo "Using $NUM_THREADS thread(s) for compilation" mkdir -p "$RISCV"/logs # Install/update system packages if root. Otherwise, check that packages are already installed. -STATUS="system packages" +STATUS="system_packages" if [ "$ROOT" == true ]; then source "${dir}"/wally-package-install.sh else @@ -211,7 +211,7 @@ fi # Create python virtual environment so the python command targets desired version of python # and installed packages are isolated from the rest of the system. section_header "Setting up Python Environment" -STATUS="python virtual environment" +STATUS="python_virtual_environment" cd "$RISCV" if [ ! -e "$RISCV"/riscv-python/bin/activate ]; then "$PYTHON_VERSION" -m venv riscv-python --prompt cvw @@ -244,8 +244,8 @@ if (( RHEL_VERSION == 8 )) || (( UBUNTU_VERSION == 20 )); then rm -f glib-2.70.5.tar.xz cd glib-2.70.5 meson setup _build --prefix="$RISCV" - meson compile -C _build -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] - meson install -C _build 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + meson compile -C _build -j "${NUM_THREADS}" 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] + meson install -C _build 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] cd "$RISCV" rm -rf glib-2.70.5 echo -e "${SUCCESS_COLOR}glib successfully installed!${ENDC}" @@ -263,8 +263,8 @@ if (( RHEL_VERSION == 8 )); then rm -f gmp-6.3.0.tar.xz cd gmp-6.3.0 ./configure --prefix="$RISCV" - make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] - make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + make -j "${NUM_THREADS}" 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] + make install 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] cd "$RISCV" rm -rf gmp-6.3.0 echo -e "${SUCCESS_COLOR}gmp successfully installed!${ENDC}" @@ -314,7 +314,7 @@ if git_check "riscv-gnu-toolchain" "https://github.com/riscv/riscv-gnu-toolchain cd "$RISCV"/riscv-gnu-toolchain git reset --hard && git clean -f && git checkout master && git pull && git submodule update ./configure --prefix="${RISCV}" --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;" - make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + make -j "${NUM_THREADS}" 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] if [ "$clean" ]; then cd "$RISCV" rm -rf riscv-gnu-toolchain @@ -341,8 +341,8 @@ if git_check "elf2hex" "https://github.com/sifive/elf2hex.git" "$RISCV/bin/riscv git reset --hard && git clean -f && git checkout master && git pull autoreconf -i ./configure --target=riscv64-unknown-elf --prefix="$RISCV" - make 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] - make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + make 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] + make install 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] if [ "$clean" ]; then cd "$RISCV" rm -rf elf2hex @@ -362,8 +362,8 @@ if git_check "qemu" "https://github.com/qemu/qemu" "$RISCV/include/qemu-plugin.h cd "$RISCV"/qemu git reset --hard && git clean -f && git checkout master && git pull ./configure --target-list=riscv64-softmmu --prefix="$RISCV" - make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] - make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + make -j "${NUM_THREADS}" 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] + make install 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] if [ "$clean" ]; then cd "$RISCV" rm -rf qemu @@ -385,8 +385,8 @@ if git_check "riscv-isa-sim" "https://github.com/riscv-software-src/riscv-isa-si mkdir -p build cd build ../configure --prefix="$RISCV" - make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] - make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + make -j "${NUM_THREADS}" 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] + make install 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] if [ "$clean" ]; then cd "$RISCV" rm -rf riscv-isa-sim @@ -410,8 +410,8 @@ if git_check "verilator" "https://github.com/verilator/verilator" "$RISCV/share/ git reset --hard && git clean -f && git checkout master && git pull autoconf ./configure --prefix="$RISCV" - make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] - make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + make -j "${NUM_THREADS}" 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] + make install 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] if [ "$clean" ]; then cd "$RISCV" rm -rf verilator @@ -428,7 +428,7 @@ fi # The Sail Compiler is written in OCaml, which is an object-oriented extension of ML, which in turn # is a functional programming language suited to formal verification. section_header "Installing/Updating Sail Compiler" -STATUS="Sail Compiler" +STATUS="sail_compiler" if [ ! -e "$RISCV"/bin/sail ]; then cd "$RISCV" wget -nv --retry-connrefused $retry_on_host_error --output-document=sail.tar.gz https://github.com/rems-project/sail/releases/latest/download/sail.tar.gz @@ -446,8 +446,8 @@ STATUS="riscv-sail-model" if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/riscv_sim_rv32d"; then cd "$RISCV"/sail-riscv git reset --hard && git clean -f && git checkout master && git pull - cmake -S . -B build -DCMAKE_BUILD_TYPE=RelWithDebInfo -GNinja 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] - cmake --build build 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + cmake -S . -B build -DCMAKE_BUILD_TYPE=RelWithDebInfo -GNinja 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] + cmake --build build 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] cp -f build/c_emulator/riscv_sim_rv64d "$RISCV"/bin/riscv_sim_rv64d cp -f build/c_emulator/riscv_sim_rv32d "$RISCV"/bin/riscv_sim_rv32d if [ "$clean" ]; then @@ -463,7 +463,7 @@ fi # OSU Skywater 130 cell library (https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12) # The OSU Skywater 130 cell library is a standard cell library that is used to synthesize Wally. section_header "Installing/Updating OSU Skywater 130 cell library" -STATUS="OSU Skywater 130 cell library" +STATUS="osu_skywater_130_cell_library" mkdir -p "$RISCV"/cad/lib cd "$RISCV"/cad/lib if git_check "sky130_osu_sc_t12" "https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12" "$RISCV/cad/lib/sky130_osu_sc_t12" "main"; then @@ -488,11 +488,11 @@ if [ ! "$no_buidroot" ]; then fi cd "$dir"/../linux if [ ! -e "$RISCV"/buildroot ]; then - FORCE_UNSAFE_CONFIGURE=1 make 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] # FORCE_UNSAFE_CONFIGURE is needed to allow buildroot to compile when run as root + FORCE_UNSAFE_CONFIGURE=1 make 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] # FORCE_UNSAFE_CONFIGURE is needed to allow buildroot to compile when run as root echo -e "${SUCCESS_COLOR}Buildroot successfully installed and Linux testvectors created!${ENDC}" elif [ ! -e "$RISCV"/linux-testvectors ]; then echo -e "${OK_COLOR}Buildroot already exists, but Linux testvectors are missing. Generating them now.${ENDC}" - make dumptvs 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + make dumptvs 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] echo -e "${SUCCESS_COLOR}Linux testvectors successfully generated!${ENDC}" else echo -e "${OK_COLOR}Buildroot and Linux testvectors already exist.${ENDC}" @@ -506,7 +506,7 @@ fi # The site-setup script is used to set up the environment for the RISC-V tools and EDA tools by setting # the PATH and other environment variables. It also sources the Python virtual environment. section_header "Downloading Site Setup Script" -STATUS="site-setup scripts" +STATUS="site-setup_scripts" cd "$RISCV" if [ ! -e "${RISCV}"/site-setup.sh ]; then wget -nv --retry-connrefused $retry_on_host_error https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.sh From a303c694a344df83454ccbc15d0f01853b812378 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 30 Jan 2025 20:22:59 -0800 Subject: [PATCH 28/40] Always run installation CI in fresh docker image --- .github/workflows/install.yml | 24 +++++++----------------- 1 file changed, 7 insertions(+), 17 deletions(-) diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index 3cf9fd041..07f5ac3c5 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -37,67 +37,57 @@ jobs: include: # Ubuntu Installations - name: ubuntu-20.04 - os: ubuntu-20.04 - container: null + container: ubuntu:20.04 + imageFamily: debian regressionFail: true - name: ubuntu-22.04 - os: ubuntu-22.04 - container: null + container: ubuntu:22.04 + imageFamily: debian - name: ubuntu-24.04 - os: ubuntu-24.04 - container: null + container: ubuntu:24.04 + imageFamily: debian # Debian Installations - name: debian-12 - os: ubuntu-latest image: debian:12 imageFamily: debian - name: debian-11 - os: ubuntu-latest image: debian:11 imageFamily: debian # Red Hat Installations - name: rocky-8 - os: ubuntu-latest image: rockylinux:8 imageFamily: redhat regressionFail: true - name: rocky-9 - os: ubuntu-latest image: rockylinux:9 imageFamily: redhat - name: almalinux-8 - os: ubuntu-latest image: almalinux:8 imageFamily: redhat regressionFail: true - name: almalinux-9 - os: ubuntu-latest image: almalinux:9 imageFamily: redhat # SUSE Installations - name: opensuse-15.6 - os: ubuntu-latest image: opensuse/leap:15.6 imageFamily: suse # User level installation - name: user-install - os: ubuntu-latest image: null user: true # Custom location installation - name: custom-install - os: ubuntu-latest image: null riscv_path: /home/riscv # Custom location user level installation - name: custom-user-install - os: ubuntu-latest image: null user: true riscv_path: $HOME/riscv-toolchain # run on selected version of ubuntu or on ubuntu-latest with docker image - runs-on: ${{ matrix.os }} + runs-on: ubuntu-latest container: image: ${{ matrix.image }} options: --privileged --mount type=bind,source=/,target=/host --pid=host --entrypoint /bin/bash # Allow for connection with host From abb8f1a8fd604e27ecd677c630f1a650526fb0e8 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 30 Jan 2025 20:26:23 -0800 Subject: [PATCH 29/40] Fix typo --- .github/workflows/install.yml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index 07f5ac3c5..922d894c5 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -37,14 +37,14 @@ jobs: include: # Ubuntu Installations - name: ubuntu-20.04 - container: ubuntu:20.04 + image: ubuntu:20.04 imageFamily: debian regressionFail: true - name: ubuntu-22.04 - container: ubuntu:22.04 + image: ubuntu:22.04 imageFamily: debian - name: ubuntu-24.04 - container: ubuntu:24.04 + image: ubuntu:24.04 imageFamily: debian # Debian Installations - name: debian-12 From 9c2e16e2c150fc1879c4d0345a24059afe738443 Mon Sep 17 00:00:00 2001 From: "dependabot[bot]" <49699333+dependabot[bot]@users.noreply.github.com> Date: Mon, 3 Feb 2025 13:37:28 +0000 Subject: [PATCH 30/40] Bump addins/cvw-arch-verif from `44278d9` to `b31c5c2` Bumps [addins/cvw-arch-verif](https://github.com/openhwgroup/cvw-arch-verif) from `44278d9` to `b31c5c2`. - [Commits](https://github.com/openhwgroup/cvw-arch-verif/compare/44278d9a918dbc337ac214cd5dba5f71aa26dcfa...b31c5c25dafd9afa653f402014d8f8365472681a) --- updated-dependencies: - dependency-name: addins/cvw-arch-verif dependency-type: direct:production ... Signed-off-by: dependabot[bot] --- addins/cvw-arch-verif | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/addins/cvw-arch-verif b/addins/cvw-arch-verif index 44278d9a9..b31c5c25d 160000 --- a/addins/cvw-arch-verif +++ b/addins/cvw-arch-verif @@ -1 +1 @@ -Subproject commit 44278d9a918dbc337ac214cd5dba5f71aa26dcfa +Subproject commit b31c5c25dafd9afa653f402014d8f8365472681a From e0980bbcd94aaa4c020236411c6483173a599193 Mon Sep 17 00:00:00 2001 From: David Harris Date: Thu, 6 Feb 2025 18:20:07 -0800 Subject: [PATCH 31/40] Initial FMA commit --- examples/exercises/fma16/fma.do | 23 +++++++++++ examples/exercises/fma16/lint-fma | 13 ++++++ examples/exercises/fma16/sim-fma | 2 + examples/exercises/fma16/sim-fma-batch | 1 + examples/exercises/fma16/testbench.sv | 52 ++++++++++++++++++++++++ examples/exercises/fma16/tests/fmul_0.tv | 5 +++ 6 files changed, 96 insertions(+) create mode 100644 examples/exercises/fma16/fma.do create mode 100755 examples/exercises/fma16/lint-fma create mode 100755 examples/exercises/fma16/sim-fma create mode 100755 examples/exercises/fma16/sim-fma-batch create mode 100644 examples/exercises/fma16/testbench.sv create mode 100644 examples/exercises/fma16/tests/fmul_0.tv diff --git a/examples/exercises/fma16/fma.do b/examples/exercises/fma16/fma.do new file mode 100644 index 000000000..111b393ca --- /dev/null +++ b/examples/exercises/fma16/fma.do @@ -0,0 +1,23 @@ +# fma.do +# +# run with vsim -do "do fma.do" +# add -c before -do for batch simulation + +onbreak {resume} + +# create library +vlib worklib + +vlog -lint -sv -work worklib fma16.sv testbench.sv +vopt +acc worklib.testbench_fma16 -work worklib -o testbenchopt +vsim -lib worklib testbenchopt + +add wave sim:/testbench_fma16/clk +add wave sim:/testbench_fma16/reset +add wave sim:/testbench_fma16/x +add wave sim:/testbench_fma16/y +add wave sim:/testbench_fma16/z +add wave sim:/testbench_fma16/result +add wave sim:/testbench_fma16/rexpected + +run -all diff --git a/examples/exercises/fma16/lint-fma b/examples/exercises/fma16/lint-fma new file mode 100755 index 000000000..b577bbd33 --- /dev/null +++ b/examples/exercises/fma16/lint-fma @@ -0,0 +1,13 @@ +#!/bin/bash +# check for warnings in Verilog code +# The verilator lint tool is faster and better than Questa so it is best to run this first. +export PATH=$PATH:/usr/local/bin/ +verilator=`which verilator` + +basepath=$(dirname $0)/.. +if ($verilator --lint-only --top-module fma16 fma16.sv); then + echo "fma16 passed lint" +else + echo "fma16 failed lint" +fi + diff --git a/examples/exercises/fma16/sim-fma b/examples/exercises/fma16/sim-fma new file mode 100755 index 000000000..bf55614c5 --- /dev/null +++ b/examples/exercises/fma16/sim-fma @@ -0,0 +1,2 @@ +vsim -do "do fma.do" + diff --git a/examples/exercises/fma16/sim-fma-batch b/examples/exercises/fma16/sim-fma-batch new file mode 100755 index 000000000..01c2472e9 --- /dev/null +++ b/examples/exercises/fma16/sim-fma-batch @@ -0,0 +1 @@ +vsim -c -do "do fma.do" diff --git a/examples/exercises/fma16/testbench.sv b/examples/exercises/fma16/testbench.sv new file mode 100644 index 000000000..ce4097abc --- /dev/null +++ b/examples/exercises/fma16/testbench.sv @@ -0,0 +1,52 @@ +/* verilator lint_off STMTDLY */ +module testbench_fma16; + logic clk, reset; + logic [15:0] x, y, z, rexpected, result; + logic [7:0] ctrl; + logic mul, add, negp, negz; + logic [1:0] roundmode; + logic [31:0] vectornum, errors; + logic [75:0] testvectors[10000:0]; + logic [3:0] flags, flagsexpected; // Invalid, Overflow, Underflow, Inexact + + // instantiate device under test + fma16 dut(x, y, z, mul, add, negp, negz, roundmode, result, flags); + + // generate clock + always + begin + clk = 1; #5; clk = 0; #5; + end + + // at start of test, load vectors and pulse reset + initial + begin + $readmemh("tests/fmul_2.tv", testvectors); + vectornum = 0; errors = 0; + reset = 1; #22; reset = 0; + end + + // apply test vectors on rising edge of clk + always @(posedge clk) + begin + #1; {x, y, z, ctrl, rexpected, flagsexpected} = testvectors[vectornum]; + {roundmode, mul, add, negp, negz} = ctrl[5:0]; + end + + // check results on falling edge of clk + always @(negedge clk) + if (~reset) begin // skip during reset + if (result !== rexpected | flags !== flagsexpected) begin // check result + $display("Error: inputs %h * %h + %h", x, y, z); + $display(" result = %h (%h expected) flags = %b (%b expected)", + result, rexpected, flags, flagsexpected); + errors = errors + 1; + end + vectornum = vectornum + 1; + if (testvectors[vectornum] === 'x) begin + $display("%d tests completed with %d errors", + vectornum, errors); + $stop; + end + end +endmodule diff --git a/examples/exercises/fma16/tests/fmul_0.tv b/examples/exercises/fma16/tests/fmul_0.tv new file mode 100644 index 000000000..b139db2a3 --- /dev/null +++ b/examples/exercises/fma16/tests/fmul_0.tv @@ -0,0 +1,5 @@ +// Multiply with exponent of 0, significand of 1.0 and 1.1, RZ +3c00_3c00_0000_08_3c00_0 // 1.000000 * 1.000000 = 1.000000 NV: 0 OF: 0 UF: 0 NX: 0 +3c00_3e00_0000_08_3e00_0 // 1.000000 * 1.500000 = 1.500000 NV: 0 OF: 0 UF: 0 NX: 0 +3e00_3c00_0000_08_3e00_0 // 1.500000 * 1.000000 = 1.500000 NV: 0 OF: 0 UF: 0 NX: 0 +3e00_3e00_0000_08_4080_0 // 1.500000 * 1.500000 = 2.250000 NV: 0 OF: 0 UF: 0 NX: 0 From 878dd74c008644cc27197d66f29ea24d3d6bfe1f Mon Sep 17 00:00:00 2001 From: David Harris Date: Thu, 6 Feb 2025 18:29:32 -0800 Subject: [PATCH 32/40] Switched testbench to fmul_0 --- examples/exercises/fma16/testbench.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/exercises/fma16/testbench.sv b/examples/exercises/fma16/testbench.sv index ce4097abc..ffc566b72 100644 --- a/examples/exercises/fma16/testbench.sv +++ b/examples/exercises/fma16/testbench.sv @@ -21,7 +21,7 @@ module testbench_fma16; // at start of test, load vectors and pulse reset initial begin - $readmemh("tests/fmul_2.tv", testvectors); + $readmemh("tests/fmul_0.tv", testvectors); vectornum = 0; errors = 0; reset = 1; #22; reset = 0; end @@ -36,7 +36,7 @@ module testbench_fma16; // check results on falling edge of clk always @(negedge clk) if (~reset) begin // skip during reset - if (result !== rexpected | flags !== flagsexpected) begin // check result + if (result !== rexpected /* | flags !== flagsexpected */) begin // check result $display("Error: inputs %h * %h + %h", x, y, z); $display(" result = %h (%h expected) flags = %b (%b expected)", result, rexpected, flags, flagsexpected); From fb3cffd008b5491b2dabe950281048bbaa0813e2 Mon Sep 17 00:00:00 2001 From: David Harris Date: Thu, 6 Feb 2025 18:42:58 -0800 Subject: [PATCH 33/40] Removed outdated lint path --- examples/exercises/fma16/lint-fma | 1 - 1 file changed, 1 deletion(-) diff --git a/examples/exercises/fma16/lint-fma b/examples/exercises/fma16/lint-fma index b577bbd33..e69fa3279 100755 --- a/examples/exercises/fma16/lint-fma +++ b/examples/exercises/fma16/lint-fma @@ -1,7 +1,6 @@ #!/bin/bash # check for warnings in Verilog code # The verilator lint tool is faster and better than Questa so it is best to run this first. -export PATH=$PATH:/usr/local/bin/ verilator=`which verilator` basepath=$(dirname $0)/.. From 2db536bf49cb3aff29c26f4d54d01b9f4cf6526a Mon Sep 17 00:00:00 2001 From: Huda-10xe Date: Thu, 6 Feb 2025 23:47:43 -0800 Subject: [PATCH 34/40] Adding RISC-V Assertions --- testbench/testbench.sv | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/testbench/testbench.sv b/testbench/testbench.sv index 696a288f1..818232287 100644 --- a/testbench/testbench.sv +++ b/testbench/testbench.sv @@ -28,6 +28,7 @@ `include "config.vh" `include "tests.vh" `include "BranchPredictorType.vh" +// `include "RV32VM_coverage copy.sv" `ifdef USE_IMPERAS_DV `include "idv/idv.svh" @@ -292,7 +293,8 @@ module testbench; # 100; TestBenchReset = 1'b0; end - + mcount u_mcounteren_checker ( + ); always_ff @(posedge clk) if (TestBenchReset) CurrState <= STATE_TESTBENCH_RESET; else CurrState <= NextState; @@ -751,6 +753,8 @@ end .CMP_CSR (1) ) idv_trace2api(rvvi); + `include "RV_Assertions.sv" + string filename; initial begin // imperasDV requires the elffile be defined at the begining of the simulation. From ed7b616c5b1a73e25e5fe21a6f6fe14bd4d69331 Mon Sep 17 00:00:00 2001 From: Huda-10xe Date: Fri, 7 Feb 2025 00:13:27 -0800 Subject: [PATCH 35/40] Removing excess code --- testbench/testbench.sv | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/testbench/testbench.sv b/testbench/testbench.sv index 818232287..4749b26ab 100644 --- a/testbench/testbench.sv +++ b/testbench/testbench.sv @@ -28,7 +28,6 @@ `include "config.vh" `include "tests.vh" `include "BranchPredictorType.vh" -// `include "RV32VM_coverage copy.sv" `ifdef USE_IMPERAS_DV `include "idv/idv.svh" @@ -293,8 +292,7 @@ module testbench; # 100; TestBenchReset = 1'b0; end - mcount u_mcounteren_checker ( - ); + always_ff @(posedge clk) if (TestBenchReset) CurrState <= STATE_TESTBENCH_RESET; else CurrState <= NextState; From 7792b1e5ffe36287e832e2d6adc65e93cbc898e8 Mon Sep 17 00:00:00 2001 From: Roman De Santos Date: Fri, 7 Feb 2025 15:37:49 -0800 Subject: [PATCH 36/40] Added Fcov tests --- config/rv32gc/coverage.svh | 5 +++++ config/rv64gc/coverage.svh | 6 ++++++ 2 files changed, 11 insertions(+) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index 20bddd5c0..50beb4b14 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -58,3 +58,8 @@ `include "EndianS_coverage.svh" `include "ExceptionsM_coverage.svh" `include "ExceptionsZc_coverage.svh" +`include "ZicntrU_coverage.svh" +`include "ZicntrS_coverage.svh" +`include "ZicntrM_coverage.svh" +`include "ZfaZfhD_coverage.svh" +`include "ZfhminD_coverage.svh" diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index fd8f11b04..0ad16d7bc 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -57,6 +57,12 @@ `include "EndianS_coverage.svh" `include "ExceptionsM_coverage.svh" `include "ExceptionsZc_coverage.svh" +`include "ZicntrU_coverage.svh" +`include "ZicntrS_coverage.svh" +`include "ZicntrM_coverage.svh" +`include "ZfaZfhD_coverage.svh" +`include "ZfhminD_coverage.svh" + // `include "RV64VM_PMP_coverage.svh" // `include "RV64CBO_VM_coverage.svh" // `include "RV64CBO_PMP_coverage.svh" From 3cc6ba85e3016e751de252573aa0df45eb4219f3 Mon Sep 17 00:00:00 2001 From: David Harris Date: Sat, 8 Feb 2025 07:59:02 -0800 Subject: [PATCH 37/40] Adding odd solutions --- examples/exercises/17p1/17p1.c | 6 ++ examples/exercises/17p1/Makefile | 11 +++ examples/exercises/3p1/3p1.S | 10 +++ examples/exercises/3p1/Makefile | 13 +++ examples/exercises/3p13/3p13.c | 6 ++ examples/exercises/3p13/Makefile | 11 +++ examples/exercises/3p15/Makefile | 19 +++++ examples/exercises/3p15/sum.S | 32 +++++++ examples/exercises/3p15/sumtest.S | 43 ++++++++++ .../exercises/3p15/sumtest.reference_output | 2 + examples/exercises/3p3/Makefile | 19 +++++ examples/exercises/3p3/sum.S | 32 +++++++ examples/exercises/3p3/sumtest.S | 43 ++++++++++ .../exercises/3p3/sumtest.reference_output | 2 + examples/exercises/3p5/Makefile | 32 +++++++ examples/exercises/3p5/matvecmul.c | 22 +++++ examples/exercises/3p7/Makefile | 32 +++++++ examples/exercises/3p7/fir.c | 83 +++++++++++++++++++ examples/exercises/3p9/Makefile | 32 +++++++ examples/exercises/3p9/inline.c | 11 +++ 20 files changed, 461 insertions(+) create mode 100644 examples/exercises/17p1/17p1.c create mode 100644 examples/exercises/17p1/Makefile create mode 100644 examples/exercises/3p1/3p1.S create mode 100644 examples/exercises/3p1/Makefile create mode 100644 examples/exercises/3p13/3p13.c create mode 100644 examples/exercises/3p13/Makefile create mode 100644 examples/exercises/3p15/Makefile create mode 100644 examples/exercises/3p15/sum.S create mode 100644 examples/exercises/3p15/sumtest.S create mode 100644 examples/exercises/3p15/sumtest.reference_output create mode 100644 examples/exercises/3p3/Makefile create mode 100644 examples/exercises/3p3/sum.S create mode 100644 examples/exercises/3p3/sumtest.S create mode 100644 examples/exercises/3p3/sumtest.reference_output create mode 100644 examples/exercises/3p5/Makefile create mode 100644 examples/exercises/3p5/matvecmul.c create mode 100644 examples/exercises/3p7/Makefile create mode 100644 examples/exercises/3p7/fir.c create mode 100644 examples/exercises/3p9/Makefile create mode 100644 examples/exercises/3p9/inline.c diff --git a/examples/exercises/17p1/17p1.c b/examples/exercises/17p1/17p1.c new file mode 100644 index 000000000..719407483 --- /dev/null +++ b/examples/exercises/17p1/17p1.c @@ -0,0 +1,6 @@ +#include + +int main(void) { + char str[] = "Hello Wally!"; + return strlen(str); +} diff --git a/examples/exercises/17p1/Makefile b/examples/exercises/17p1/Makefile new file mode 100644 index 000000000..dc50ce2fa --- /dev/null +++ b/examples/exercises/17p1/Makefile @@ -0,0 +1,11 @@ +TARGET = 17p1 + +$(TARGET).objdump: $(TARGET).elf + riscv64-unknown-elf-objdump -D $(TARGET).elf > $(TARGET).objdump + +$(TARGET).elf: $(TARGET).c Makefile + riscv64-unknown-elf-gcc -g -o $(TARGET) -march=rv64gc_zbb -mabi=lp64 -mcmodel=medany \ + -nostartfiles -T../../link/link.ld $(TARGET).c -o $(TARGET).elf + +clean: + rm -f $(TARGET).elf $(TARGET).objdump diff --git a/examples/exercises/3p1/3p1.S b/examples/exercises/3p1/3p1.S new file mode 100644 index 000000000..f17ba2718 --- /dev/null +++ b/examples/exercises/3p1/3p1.S @@ -0,0 +1,10 @@ +.section .text.init +.globl rvtest_entry_point + +rvtest_entry_point: + li t0, 0x42 + li t1, 0xED + add t2, t0, t1 + +self_loop: + j self_loop diff --git a/examples/exercises/3p1/Makefile b/examples/exercises/3p1/Makefile new file mode 100644 index 000000000..a93771689 --- /dev/null +++ b/examples/exercises/3p1/Makefile @@ -0,0 +1,13 @@ +TARGET = 3p1 + +$(TARGET).objdump: $(TARGET).elf + riscv64-unknown-elf-objdump -D $(TARGET).elf > $(TARGET).objdump + +$(TARGET).elf: $(TARGET).S Makefile + riscv64-unknown-elf-gcc -g -o $(TARGET) -march=rv64gc -mabi=lp64 -mcmodel=medany \ + -nostartfiles -T../../link/link.ld $(TARGET).S -o $(TARGET).elf + +clean: + rm -f $(TARGET).elf $(TARGET).objdump + + diff --git a/examples/exercises/3p13/3p13.c b/examples/exercises/3p13/3p13.c new file mode 100644 index 000000000..719407483 --- /dev/null +++ b/examples/exercises/3p13/3p13.c @@ -0,0 +1,6 @@ +#include + +int main(void) { + char str[] = "Hello Wally!"; + return strlen(str); +} diff --git a/examples/exercises/3p13/Makefile b/examples/exercises/3p13/Makefile new file mode 100644 index 000000000..85ed5d3c6 --- /dev/null +++ b/examples/exercises/3p13/Makefile @@ -0,0 +1,11 @@ +TARGET = 3p13 + +$(TARGET).objdump: $(TARGET).elf + riscv64-unknown-elf-objdump -D $(TARGET).elf > $(TARGET).objdump + +$(TARGET).elf: $(TARGET).c Makefile + riscv64-unknown-elf-gcc -g -o $(TARGET) -march=rv32gc -mabi=ilp32 -mcmodel=medany \ + -nostartfiles -T../../link/link.ld $(TARGET).c -o $(TARGET).elf + +clean: + rm -f $(TARGET).elf $(TARGET).objdump diff --git a/examples/exercises/3p15/Makefile b/examples/exercises/3p15/Makefile new file mode 100644 index 000000000..cec51f09a --- /dev/null +++ b/examples/exercises/3p15/Makefile @@ -0,0 +1,19 @@ +TARGET = sumtest + +$(TARGET).objdump: $(TARGET) + riscv64-unknown-elf-objdump -D $(TARGET) > $(TARGET).objdump + +$(TARGET): $(TARGET).S sum.S Makefile + riscv64-unknown-elf-gcc -g -o $(TARGET) -march=rv64gc -mabi=lp64 -mcmodel=medany \ + -nostartfiles -T../../link/link.ld $(TARGET).S sum.S + +sim: + riscv_sim_RV64 -T $(TARGET).signature.output --signature-granularity 8 $(TARGET) + diff --ignore-case $(TARGET).signature.output $(TARGET).reference_output || exit + echo "Signature matches! Success!" + +clean: + rm -f $(TARGET) $(TARGET).objdump $(TARGET).signature.output + + + diff --git a/examples/exercises/3p15/sum.S b/examples/exercises/3p15/sum.S new file mode 100644 index 000000000..ab87eb0ec --- /dev/null +++ b/examples/exercises/3p15/sum.S @@ -0,0 +1,32 @@ +// sum.s +// David_Harris@hmc.edu 24 December 2021 +// Add up numbers from 1 to N. + +// result in s0, i in s1, N in a0, return answer in a0 +// +// long sum(long N) { +// long result, i; +// result = 0; +// for (i=1; i<=N; i++) result = result + i; +// return result; +// } + +.global sum +sum: + addi sp, sp, -16 # make room to save s0 and s1 on the stack + sd s0, 0(sp) + sd s1, 8(sp) + + li s0, 0 # result = 0 + li s1, 1 # i = 1 +for: bgt s1, a0, done # exit loop if i > n + add s0, s0, s1 # result = result + i + addi s1, s1, 1 # i++ + j for # repeat + +done: + mv a0, s0 # put result in a0 to return + ld s0, 0(sp) # restore s0 and s1 from stack + ld s1, 8(sp) + addi sp, sp, 16 + ret # return from function diff --git a/examples/exercises/3p15/sumtest.S b/examples/exercises/3p15/sumtest.S new file mode 100644 index 000000000..a1b57689f --- /dev/null +++ b/examples/exercises/3p15/sumtest.S @@ -0,0 +1,43 @@ +// sumtest.S +// David_Harris@hmc.edu 24 December 2021 + +.global rvtest_entry_point +rvtest_entry_point: + la sp, topofstack # Initialize stack pointer + la t0, N # get address of N in data + ld a0, 0(t0) # load N + csrr s8, instret # count instructions before call + jal sum # call sum(N) + csrr s9, instret # count instructions after call + sub s9, s9, s8 # length of call + la t0, begin_signature # address of signature + sd a0, 0(t0) # store sum(N) in signature + sd s9, 8(t0) # record performance + +write_tohost: + la t1, tohost + li t0, 1 # 1 for success, 3 for failure + sd t0, 0(t1) # send success code + +self_loop: + j self_loop # wait + +.section .tohost +tohost: # write to HTIF + .dword 0 +fromhost: + .dword 0 + +.data +N: + .dword 6 + +.EQU XLEN,64 +begin_signature: + .fill 2*(XLEN/32),4,0xdeadbeef # +end_signature: + +# Initialize stack with room for 512 bytes +.bss + .space 512 +topofstack: diff --git a/examples/exercises/3p15/sumtest.reference_output b/examples/exercises/3p15/sumtest.reference_output new file mode 100644 index 000000000..34200f638 --- /dev/null +++ b/examples/exercises/3p15/sumtest.reference_output @@ -0,0 +1,2 @@ +0000000000000015 +0000000000000025 diff --git a/examples/exercises/3p3/Makefile b/examples/exercises/3p3/Makefile new file mode 100644 index 000000000..ba7734ca1 --- /dev/null +++ b/examples/exercises/3p3/Makefile @@ -0,0 +1,19 @@ +TARGET = sumtest + +$(TARGET).objdump: $(TARGET) + riscv64-unknown-elf-objdump -D $(TARGET) > $(TARGET).objdump + +$(TARGET): $(TARGET).S sum.S Makefile + riscv64-unknown-elf-gcc -g -o $(TARGET) -march=rv64gc -mabi=lp64 -mcmodel=medany \ + -nostartfiles -T../../link/link.ld $(TARGET).S sum.S + +sim: + spike +signature=$(TARGET).signature.output +signature-granularity=8 $(TARGET) + diff --ignore-case $(TARGET).signature.output $(TARGET).reference_output || exit + echo "Signature matches! Success!" + +clean: + rm -f $(TARGET) $(TARGET).objdump $(TARGET).signature.output + + + diff --git a/examples/exercises/3p3/sum.S b/examples/exercises/3p3/sum.S new file mode 100644 index 000000000..ab87eb0ec --- /dev/null +++ b/examples/exercises/3p3/sum.S @@ -0,0 +1,32 @@ +// sum.s +// David_Harris@hmc.edu 24 December 2021 +// Add up numbers from 1 to N. + +// result in s0, i in s1, N in a0, return answer in a0 +// +// long sum(long N) { +// long result, i; +// result = 0; +// for (i=1; i<=N; i++) result = result + i; +// return result; +// } + +.global sum +sum: + addi sp, sp, -16 # make room to save s0 and s1 on the stack + sd s0, 0(sp) + sd s1, 8(sp) + + li s0, 0 # result = 0 + li s1, 1 # i = 1 +for: bgt s1, a0, done # exit loop if i > n + add s0, s0, s1 # result = result + i + addi s1, s1, 1 # i++ + j for # repeat + +done: + mv a0, s0 # put result in a0 to return + ld s0, 0(sp) # restore s0 and s1 from stack + ld s1, 8(sp) + addi sp, sp, 16 + ret # return from function diff --git a/examples/exercises/3p3/sumtest.S b/examples/exercises/3p3/sumtest.S new file mode 100644 index 000000000..a1b57689f --- /dev/null +++ b/examples/exercises/3p3/sumtest.S @@ -0,0 +1,43 @@ +// sumtest.S +// David_Harris@hmc.edu 24 December 2021 + +.global rvtest_entry_point +rvtest_entry_point: + la sp, topofstack # Initialize stack pointer + la t0, N # get address of N in data + ld a0, 0(t0) # load N + csrr s8, instret # count instructions before call + jal sum # call sum(N) + csrr s9, instret # count instructions after call + sub s9, s9, s8 # length of call + la t0, begin_signature # address of signature + sd a0, 0(t0) # store sum(N) in signature + sd s9, 8(t0) # record performance + +write_tohost: + la t1, tohost + li t0, 1 # 1 for success, 3 for failure + sd t0, 0(t1) # send success code + +self_loop: + j self_loop # wait + +.section .tohost +tohost: # write to HTIF + .dword 0 +fromhost: + .dword 0 + +.data +N: + .dword 6 + +.EQU XLEN,64 +begin_signature: + .fill 2*(XLEN/32),4,0xdeadbeef # +end_signature: + +# Initialize stack with room for 512 bytes +.bss + .space 512 +topofstack: diff --git a/examples/exercises/3p3/sumtest.reference_output b/examples/exercises/3p3/sumtest.reference_output new file mode 100644 index 000000000..34200f638 --- /dev/null +++ b/examples/exercises/3p3/sumtest.reference_output @@ -0,0 +1,2 @@ +0000000000000015 +0000000000000025 diff --git a/examples/exercises/3p5/Makefile b/examples/exercises/3p5/Makefile new file mode 100644 index 000000000..d93502ee6 --- /dev/null +++ b/examples/exercises/3p5/Makefile @@ -0,0 +1,32 @@ +TARGET = matvecmul + +$(TARGET).objdump: $(TARGET) + riscv64-unknown-elf-objdump -S -D $(TARGET) > $(TARGET).objdump + +$(TARGET): $(TARGET).c Makefile + riscv64-unknown-elf-gcc -o $(TARGET) -gdwarf-2 -O\ + -march=rv64gc -mabi=lp64d -mcmodel=medany \ + -nostdlib -static -lm -fno-tree-loop-distribute-patterns \ + -T../../C/common/test.ld -I../../C/common \ + $(TARGET).c ../../C/common/crt.S ../../C/common/syscalls.c +# Compiler flags: +# -o $(TARGET) defines the name of the output file +# -g generates debugging symbols for gdb +# -O turns on basic optimization; -O3 turns on heavy optimization; omit for no optimization +# -march=rv64gc -mabi=lp64d =mcmodel=medany generates code for RV64GC with doubles and long/ptrs = 64 bits +# -static forces static linking (no dynamic shared libraries on bare metal) +# -lm links the math library if necessary (when #include math.h) +# -nostdlib avoids inserting standard startup files and default libraries +# because we are using crt.s on bare metal +# -fno-tree-loop-distribute-patterns turns replacing loops with memcpy/memset in the std library +# -T specifies the linker file +# -I specifies the include path (e.g. for util.h) +# The last line defines the C files to compile. +# crt.S is needed as our startup file to initialize the processor +# syscalls.c implements printf through the HTIF for Spike +# other flags from riscv-tests makefiles that don't seem to be important +# -ffast-math -DPREALLOCATE=1 -std=gnu99 \ +# -fno-common -fno-builtin-printf -nostartfiles -lgcc \ + +clean: + rm -f $(TARGET) $(TARGET).objdump diff --git a/examples/exercises/3p5/matvecmul.c b/examples/exercises/3p5/matvecmul.c new file mode 100644 index 000000000..424c27ab0 --- /dev/null +++ b/examples/exercises/3p5/matvecmul.c @@ -0,0 +1,22 @@ +#include // supports printf +#include "util.h" // supports verify + +// Matrix-vector multiplication y = Ax. +// A is an m rows x n columns matrix. +void matvecmul(int A[], int x[], int y[], int m, int n) { + int i, j, sum; + for (i=0; i $(TARGET).objdump + +$(TARGET): $(TARGET).c Makefile + riscv64-unknown-elf-gcc -o $(TARGET) -gdwarf-2 -O2\ + -march=rv64gc -mabi=lp64d -mcmodel=medany \ + -nostdlib -static -lm -fno-tree-loop-distribute-patterns \ + -T../../C/common/test.ld -I../../C/common \ + $(TARGET).c ../../C/common/crt.S ../../C/common/syscalls.c +# Compiler flags: +# -o $(TARGET) defines the name of the output file +# -g generates debugging symbols for gdb +# -O turns on basic optimization; -O3 turns on heavy optimization; omit for no optimization +# -march=rv64gc -mabi=lp64d =mcmodel=medany generates code for RV64GC with doubles and long/ptrs = 64 bits +# -static forces static linking (no dynamic shared libraries on bare metal) +# -lm links the math library if necessary (when #include math.h) +# -nostdlib avoids inserting standard startup files and default libraries +# because we are using crt.s on bare metal +# -fno-tree-loop-distribute-patterns turns replacing loops with memcpy/memset in the std library +# -T specifies the linker file +# -I specifies the include path (e.g. for util.h) +# The last line defines the C files to compile. +# crt.S is needed as our startup file to initialize the processor +# syscalls.c implements printf through the HTIF for Spike +# other flags from riscv-tests makefiles that don't seem to be important +# -ffast-math -DPREALLOCATE=1 -std=gnu99 \ +# -fno-common -fno-builtin-printf -nostartfiles -lgcc \ + +clean: + rm -f $(TARGET) $(TARGET).objdump diff --git a/examples/exercises/3p7/fir.c b/examples/exercises/3p7/fir.c new file mode 100644 index 000000000..05e969732 --- /dev/null +++ b/examples/exercises/3p7/fir.c @@ -0,0 +1,83 @@ +#include // supports printf +#include "util.h" // supports verify + +// Add two Q1.31 fixed point numbers +int add_q31(int a, int b) { + return a + b; +} + +// Multiplly two Q1.31 fixed point numbers +int mul_q31(int a, int b) { + long res = (long)a * (long)b; + int result = res >> 31; // shift right to get the 32-bit result; this is equivalent to shifting left by 1 and discarding the bottom 32 bits + //printf("mul_q31: a = %x, b = %x, res = %lx, result = %x\n", a, b, res, result); + return result; +} + + +// low pass filter x with coefficients c, result in y +// n is the length of x, m is the length of c +// y[i] = c[0]*x[i] + c[1]*x[i+1] + ... + c[m-1]*x[i+m-1] +// inputs in Q1.31 format +void fir(int x[], int c[], int y[], int n, int m) { + int i, j; + for (j=0; j $(TARGET).objdump + +$(TARGET): $(TARGET).c Makefile + riscv64-unknown-elf-gcc -o $(TARGET) -gdwarf-2 -O\ + -march=rv64gc -mabi=lp64d -mcmodel=medany \ + -nostdlib -static -lm -fno-tree-loop-distribute-patterns \ + -T../../C/common/test.ld -I../../C/common \ + $(TARGET).c ../../C/common/crt.S ../../C/common/syscalls.c +# Compiler flags: +# -o $(TARGET) defines the name of the output file +# -g generates debugging symbols for gdb +# -O turns on basic optimization; -O3 turns on heavy optimization; omit for no optimization +# -march=rv64gc -mabi=lp64d =mcmodel=medany generates code for RV64GC with doubles and long/ptrs = 64 bits +# -static forces static linking (no dynamic shared libraries on bare metal) +# -lm links the math library if necessary (when #include math.h) +# -nostdlib avoids inserting standard startup files and default libraries +# because we are using crt.s on bare metal +# -fno-tree-loop-distribute-patterns turns replacing loops with memcpy/memset in the std library +# -T specifies the linker file +# -I specifies the include path (e.g. for util.h) +# The last line defines the C files to compile. +# crt.S is needed as our startup file to initialize the processor +# syscalls.c implements printf through the HTIF for Spike +# other flags from riscv-tests makefiles that don't seem to be important +# -ffast-math -DPREALLOCATE=1 -std=gnu99 \ +# -fno-common -fno-builtin-printf -nostartfiles -lgcc \ + +clean: + rm -f $(TARGET) $(TARGET).objdump diff --git a/examples/exercises/3p9/inline.c b/examples/exercises/3p9/inline.c new file mode 100644 index 000000000..03787eb09 --- /dev/null +++ b/examples/exercises/3p9/inline.c @@ -0,0 +1,11 @@ +#include // supports printf +int main(void) { + int a = 3; + int b = 4; + int c; + // compute c = a + 2*b using inline assembly + asm volatile("slli %0, %1, 1" : "=r" (c) : "r" (b)); // c = b << 1 + asm volatile("add %0, %1, %2" : "=r" (c) : "r" (a), "r" (c)); // c = a + c + + printf("c = %d\n", c); +} From c3f3cda2725ccb7add0bdef45888eb75a4b27ae1 Mon Sep 17 00:00:00 2001 From: David Harris Date: Sat, 8 Feb 2025 10:31:08 -0800 Subject: [PATCH 38/40] Added fma16_testgen for fmul_0 tests --- examples/exercises/fma16/Makefile | 16 +++ examples/exercises/fma16/fma16_testgen.c | 146 +++++++++++++++++++++++ 2 files changed, 162 insertions(+) create mode 100644 examples/exercises/fma16/Makefile create mode 100644 examples/exercises/fma16/fma16_testgen.c diff --git a/examples/exercises/fma16/Makefile b/examples/exercises/fma16/Makefile new file mode 100644 index 000000000..3c2da67f5 --- /dev/null +++ b/examples/exercises/fma16/Makefile @@ -0,0 +1,16 @@ + + +CC = gcc +CFLAGS = -O3 -Wno-format-overflow +IFLAGS = -I$(WALLY)/addins/berkeley-softfloat-3/source/include/ +LIBS = $(WALLY)/addins/berkeley-softfloat-3/build/Linux-x86_64-GCC/softfloat.a -lm -lquadmath +SRCS = $(wildcard *.c) +PROGS = $(patsubst %.c,%,$(SRCS)) + +all: $(PROGS) + +%: %.c + $(CC) $(CFLAGS) -DSOFTFLOAT_FAST_INT64 $(IFLAGS) $(LFLAGS) -o $@ $< $(LIBS) + +clean: + rm -f $(PROGS) diff --git a/examples/exercises/fma16/fma16_testgen.c b/examples/exercises/fma16/fma16_testgen.c new file mode 100644 index 000000000..c7855ca59 --- /dev/null +++ b/examples/exercises/fma16/fma16_testgen.c @@ -0,0 +1,146 @@ +// fma16_testgen.c +// David_Harris 8 February 2025 +// Generate tests for 16-bit FMA +// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 + +#include +#include +#include +#include "softfloat.h" +#include "softfloat_types.h" + +typedef union sp { + float32_t v; + float f; +} sp; + +// lists of tests, terminated with 0x8000 +uint16_t easyExponents[] = {15, 0x8000}; +uint16_t easyFracts[] = {0, 0x200, 0x8000}; // 1.0 and 1.1 + +void softfloatInit(void) { + softfloat_roundingMode = softfloat_round_minMag; + softfloat_exceptionFlags = 0; + softfloat_detectTininess = softfloat_tininess_beforeRounding; +} + +float convFloat(float16_t f16) { + float32_t f32; + float res; + sp r; + + // convert half to float for printing + f32 = f16_to_f32(f16); + r.v = f32; + res = r.f; + return res; +} + +void genCase(FILE *fptr, float16_t x, float16_t y, float16_t z, int mul, int add, int negp, int negz, int roundingMode, int zeroAllowed, int infAllowed, int nanAllowed) { + float16_t result; + int op, flagVals; + char calc[80], flags[80]; + float32_t x32, y32, z32, r32; + float xf, yf, zf, rf; + float16_t smallest; + + if (!mul) y.v = 0x3C00; // force y to 1 to avoid multiply + if (!add) z.v = 0x0000; // force z to 0 to avoid add + if (negp) x.v ^= 0x8000; // flip sign of x to negate p + if (negz) z.v ^= 0x8000; // flip sign of z to negate z + op = roundingMode << 4 | mul<<3 | add<<2 | negp<<1 | negz; +// printf("op = %02x rm %d mul %d add %d negp %d negz %d\n", op, roundingMode, mul, add, negp, negz); + softfloat_exceptionFlags = 0; // clear exceptions + result = f16_mulAdd(x, y, z); // call SoftFloat to compute expected result + + // Extract expected flags from SoftFloat + sprintf(flags, "NV: %d OF: %d UF: %d NX: %d", + (softfloat_exceptionFlags >> 4) % 2, + (softfloat_exceptionFlags >> 2) % 2, + (softfloat_exceptionFlags >> 1) % 2, + (softfloat_exceptionFlags) % 2); + // pack these four flags into one nibble, discarding DZ flag + flagVals = softfloat_exceptionFlags & 0x7 | ((softfloat_exceptionFlags >> 1) & 0x8); + + // convert to floats for printing + xf = convFloat(x); + yf = convFloat(y); + zf = convFloat(z); + rf = convFloat(result); + if (mul) + if (add) sprintf(calc, "%f * %f + %f = %f", xf, yf, zf, rf); + else sprintf(calc, "%f * %f = %f", xf, yf, rf); + else sprintf(calc, "%f + %f = %f", xf, zf, rf); + + // omit denorms, which aren't required for this project + smallest.v = 0x0400; + float16_t resultmag = result; + resultmag.v &= 0x7FFF; // take absolute value + if (f16_lt(resultmag, smallest) && (resultmag.v != 0x0000)) fprintf (fptr, "// skip denorm: "); + if ((softfloat_exceptionFlags) >> 1 % 2) fprintf(fptr, "// skip underflow: "); + + // skip special cases if requested + if (resultmag.v == 0x0000 && !zeroAllowed) fprintf(fptr, "// skip zero: "); + if ((resultmag.v == 0x7C00 || resultmag.v == 0x7BFF) && !infAllowed) fprintf(fptr, "// Skip inf: "); + if (resultmag.v > 0x7C00 && !nanAllowed) fprintf(fptr, "// Skip NaN: "); + + // print the test case + fprintf(fptr, "%04x_%04x_%04x_%02x_%04x_%01x // %s %s\n", x.v, y.v, z.v, op, result.v, flagVals, calc, flags); +} + +void prepTests(uint16_t *e, uint16_t *f, char *testName, char *desc, float16_t *cases, + FILE *fptr, int *numCases) { + int i, j; + + // Loop over all of the exponents and fractions, generating and counting all cases + fprintf(fptr, "%s", desc); fprintf(fptr, "\n"); + *numCases=0; + for (i=0; e[i] != 0x8000; i++) + for (j=0; f[j] != 0x8000; j++) { + cases[*numCases].v = f[j] | e[i]<<10; + *numCases = *numCases + 1; + } +} + +void genMulTests(uint16_t *e, uint16_t *f, int sgn, char *testName, char *desc, int roundingMode, int zeroAllowed, int infAllowed, int nanAllowed) { + int i, j, k, numCases; + float16_t x, y, z; + float16_t cases[100000]; + FILE *fptr; + char fn[80]; + + sprintf(fn, "work/%s.tv", testName); + if ((fptr = fopen(fn, "w")) == 0) { + printf("Error opening to write file %s. Does directory exist?\n", fn); + exit(1); + } + prepTests(e, f, testName, desc, cases, fptr, &numCases); + z.v = 0x0000; + for (i=0; i < numCases; i++) { + x.v = cases[i].v; + for (j=0; j Date: Sat, 8 Feb 2025 10:35:23 -0800 Subject: [PATCH 39/40] Updated gitignore for fma16 project --- .gitignore | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/.gitignore b/.gitignore index f23aec9b5..5cc50079c 100644 --- a/.gitignore +++ b/.gitignore @@ -168,3 +168,8 @@ config/deriv sim/slack-notifier/slack-webhook-url.txt docs/docker/buildroot-config-src docs/docker/testvector-generation +examples/C/fmul +examples/exercises/fma16/fma16.sv +examples/exercises/fma16/fma16_testgen +examples/exercises/fma16/sol +examples/exercises/riscvsoc_solutions From f909f7d3152ae55a66b1e164f144a7a242b19b15 Mon Sep 17 00:00:00 2001 From: David Harris Date: Sat, 8 Feb 2025 15:45:33 -0800 Subject: [PATCH 40/40] Cleanup --- .gitignore | 11 ++++++----- examples/exercises/fma16/fma16_testgen.c | 1 + 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/.gitignore b/.gitignore index 5cc50079c..11acaf0b1 100644 --- a/.gitignore +++ b/.gitignore @@ -161,6 +161,12 @@ examples/asm/sumtest/sumtest examples/asm/example/example examples/asm/trap/trap examples/asm/etc/pause +examples/C/fmul +examples/exercises/fma16/fma16.sv +examples/exercises/fma16/fma16_testgen +examples/exercises/fma16/sol +examples/exercises/riscvsoc_solutions + # Other external @@ -168,8 +174,3 @@ config/deriv sim/slack-notifier/slack-webhook-url.txt docs/docker/buildroot-config-src docs/docker/testvector-generation -examples/C/fmul -examples/exercises/fma16/fma16.sv -examples/exercises/fma16/fma16_testgen -examples/exercises/fma16/sol -examples/exercises/riscvsoc_solutions diff --git a/examples/exercises/fma16/fma16_testgen.c b/examples/exercises/fma16/fma16_testgen.c index c7855ca59..dd9339fba 100644 --- a/examples/exercises/fma16/fma16_testgen.c +++ b/examples/exercises/fma16/fma16_testgen.c @@ -131,6 +131,7 @@ void genMulTests(uint16_t *e, uint16_t *f, int sgn, char *testName, char *desc, int main() { + if (system("mkdir -p work") != 0) exit(1); // create work directory if it doesn't exist softfloatInit(); // configure softfloat modes // Test cases: multiplication