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added changes to testbench, tests and riscof for additional riscof compatability

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This commit is contained in:
Daniel Torres 2022-06-29 12:23:40 -07:00
parent 54938c7abf
commit 50b9b4557c
5 changed files with 94 additions and 74 deletions
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6
pipelined/testbench/testbench.sv
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@ -68,6 +68,7 @@ logic [3:0] dummy;
integer ProgramAddrLabelArray [string] = '{ "begin_signature" : 0, "tohost" : 0 }; integer ProgramAddrLabelArray [string] = '{ "begin_signature" : 0, "tohost" : 0 };
logic DCacheFlushDone, DCacheFlushStart; logic DCacheFlushDone, DCacheFlushStart;
logic riscofTest;
flopenr #(`XLEN) PCWReg(clk, reset, ~dut.core.ieu.dp.StallW, dut.core.ifu.PCM, PCW); flopenr #(`XLEN) PCWReg(clk, reset, ~dut.core.ieu.dp.StallW, dut.core.ifu.PCM, PCW);
flopenr #(32) InstrWReg(clk, reset, ~dut.core.ieu.dp.StallW, dut.core.ifu.InstrM, InstrW); flopenr #(32) InstrWReg(clk, reset, ~dut.core.ieu.dp.StallW, dut.core.ifu.InstrM, InstrW);
@ -174,6 +175,8 @@ logic [3:0] dummy;
totalerrors = 0; totalerrors = 0;
testadr = 0; testadr = 0;
testadrNoBase = 0; testadrNoBase = 0;
// riscof tests have a different signature, tests[0] == "1" refers to RiscvArchTests and tests[0] == "2" refers to WallyRiscvArchTests
riscofTest = tests[0] == "1"; // | tests[0] == "2";
// fill memory with defined values to reduce Xs in simulation // fill memory with defined values to reduce Xs in simulation
// Quick note the memory will need to be initialized. The C library does not // Quick note the memory will need to be initialized. The C library does not
// guarantee the initialized reads. For example a strcmp can read 6 byte // guarantee the initialized reads. For example a strcmp can read 6 byte
@ -250,8 +253,7 @@ logic [3:0] dummy;
for(i=0; i<SIGNATURESIZE; i=i+1) begin for(i=0; i<SIGNATURESIZE; i=i+1) begin
sig32[i] = 'bx; sig32[i] = 'bx;
end end
// riscof tests have a different signature, tests[0] == "1" refers to RISCVARCHTESTs if (riscofTest) signame = {pathname, tests[test], "erence-sail_c_simulator.signature"};
if (tests[0] == "1") signame = {pathname, tests[test], "erence-sail_c_simulator.signature"};
else signame = {pathname, tests[test], ".signature.output"}; else signame = {pathname, tests[test], ".signature.output"};
// read signature, reformat in 64 bits if necessary // read signature, reformat in 64 bits if necessary
$readmemh(signame, sig32); $readmemh(signame, sig32);

119
pipelined/testbench/tests.vh
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@ -33,8 +33,8 @@
string tvpaths[] = '{ string tvpaths[] = '{
"../../addins/imperas-riscv-tests/work/", "../../addins/imperas-riscv-tests/work/",
"../../tests/riscof/work/", "../../tests/riscof/work/riscv-arch-test/",
"../../tests/wally-riscv-arch-test/work/", "../../tests/riscof/work/wally-riscv-arch-test/",
"../../tests/imperas-riscv-tests/work/", "../../tests/imperas-riscv-tests/work/",
"../../benchmarks/riscv-coremark/work/", "../../benchmarks/riscv-coremark/work/",
"../../addins/embench-iot/" "../../addins/embench-iot/"
@ -95,16 +95,16 @@ string tvpaths[] = '{
string wally64a[] = '{ string wally64a[] = '{
`WALLYTEST, `WALLYTEST,
"rv64i_m/privilege/WALLY-amo", "rv64i_m/privilege/src/WALLY-amo.S/ref/Ref",
"rv64i_m/privilege/WALLY-lrsc", "rv64i_m/privilege/src/WALLY-lrsc.S/ref/Ref",
"rv64i_m/privilege/WALLY-status-fp-enabled-01" "rv64i_m/privilege/src/WALLY-status-fp-enabled-01.S/ref/Ref"
}; };
string wally32a[] = '{ string wally32a[] = '{
`WALLYTEST, `WALLYTEST,
"rv32i_m/privilege/WALLY-amo", "rv32i_m/privilege/src/WALLY-amo.S/ref/Ref",
"rv32i_m/privilege/WALLY-lrsc", "rv32i_m/privilege/src/WALLY-lrsc.S/ref/Ref",
"rv32i_m/privilege/WALLY-status-fp-enabled-01" "rv32i_m/privilege/src/WALLY-status-fp-enabled-01.S/ref/Ref"
}; };
@ -1490,41 +1490,40 @@ string imperas32f[] = '{
string wally64i[] = '{ string wally64i[] = '{
`WALLYTEST, `WALLYTEST,
"rv64i_m/I/WALLY-ADD", "rv64i_m/I/src/WALLY-ADD.S/ref/Ref",
"rv64i_m/I/WALLY-SLT", "rv64i_m/I/src/WALLY-SLT.S/ref/Ref",
"rv64i_m/I/WALLY-SLTU", "rv64i_m/I/src/WALLY-SLTU.S/ref/Ref",
"rv64i_m/I/WALLY-SUB", "rv64i_m/I/src/WALLY-SUB.S/ref/Ref",
"rv64i_m/I/WALLY-XOR" "rv64i_m/I/src/WALLY-XOR.S/ref/Ref"
}; };
string wally64priv[] = '{ string wally64priv[] = '{
`WALLYTEST, `WALLYTEST,
"rv64i_m/privilege/WALLY-status-tw-01", "rv64i_m/privilege/src/WALLY-csr-permission-s-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-csr-permission-s-01", "rv64i_m/privilege/src/WALLY-csr-permission-u-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-csr-permission-u-01", "rv64i_m/privilege/src/WALLY-mie-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-minfo-01", "rv64i_m/privilege/src/WALLY-minfo-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-misa-01", "rv64i_m/privilege/src/WALLY-misa-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-mmu-sv39", "rv64i_m/privilege/src/WALLY-mmu-sv39.S/ref/Ref",
"rv64i_m/privilege/WALLY-mmu-sv48", "rv64i_m/privilege/src/WALLY-mmu-sv48.S/ref/Ref",
"rv64i_m/privilege/WALLY-pma", "rv64i_m/privilege/src/WALLY-mtvec-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-pmp", "rv64i_m/privilege/src/WALLY-pma.S/ref/Ref",
"rv64i_m/privilege/WALLY-trap-01", "rv64i_m/privilege/src/WALLY-pmp.S/ref/Ref",
"rv64i_m/privilege/WALLY-trap-s-01", "rv64i_m/privilege/src/WALLY-sie-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-trap-u-01", "rv64i_m/privilege/src/WALLY-status-mie-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-mie-01", "rv64i_m/privilege/src/WALLY-status-sie-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-sie-01", "rv64i_m/privilege/src/WALLY-status-tw-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-mtvec-01", "rv64i_m/privilege/src/WALLY-stvec-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-stvec-01", "rv64i_m/privilege/src/WALLY-trap-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-status-mie-01", "rv64i_m/privilege/src/WALLY-trap-s-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-status-sie-01", "rv64i_m/privilege/src/WALLY-trap-sret-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-trap-sret-01", "rv64i_m/privilege/src/WALLY-trap-u-01.S/ref/Ref",
"rv64i_m/privilege/WALLY-status-tw-01", "rv64i_m/privilege/src/WALLY-wfi-01.S/ref/Ref"
"rv64i_m/privilege/WALLY-wfi-01"
}; };
string wally64periph[] = '{ string wally64periph[] = '{
`WALLYTEST, `WALLYTEST,
"rv64i_m/privilege/WALLY-periph" "rv64i_m/privilege/src/WALLY-periph.S/ref/Ref"
}; };
string wally32e[] = '{ string wally32e[] = '{
@ -1569,38 +1568,38 @@ string imperas32f[] = '{
string wally32i[] = '{ string wally32i[] = '{
`WALLYTEST, `WALLYTEST,
"rv32i_m/I/WALLY-ADD", "rv32i_m/I/src/WALLY-ADD.S/ref/Ref",
"rv32i_m/I/WALLY-SLT", "rv32i_m/I/src/WALLY-SLT.S/ref/Ref",
"rv32i_m/I/WALLY-SLTU", "rv32i_m/I/src/WALLY-SLTU.S/ref/Ref",
"rv32i_m/I/WALLY-SUB", "rv32i_m/I/src/WALLY-SUB.S/ref/Ref",
"rv32i_m/I/WALLY-XOR" "rv32i_m/I/src/WALLY-XOR.S/ref/Ref"
}; };
string wally32priv[] = '{ string wally32priv[] = '{
`WALLYTEST, `WALLYTEST,
"rv32i_m/privilege/WALLY-csr-permission-s-01", "rv32i_m/privilege/src/WALLY-csr-permission-s-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-csr-permission-u-01", "rv32i_m/privilege/src/WALLY-csr-permission-u-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-minfo-01", "rv32i_m/privilege/src/WALLY-mie-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-misa-01", "rv32i_m/privilege/src/WALLY-minfo-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-mmu-sv32", "rv32i_m/privilege/src/WALLY-misa-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-pma", "rv32i_m/privilege/src/WALLY-mmu-sv32.S/ref/Ref",
"rv32i_m/privilege/WALLY-pmp", "rv32i_m/privilege/src/WALLY-mtvec-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-trap-01", "rv32i_m/privilege/src/WALLY-pma.S/ref/Ref",
"rv32i_m/privilege/WALLY-trap-s-01", "rv32i_m/privilege/src/WALLY-pmp.S/ref/Ref",
"rv32i_m/privilege/WALLY-trap-u-01", "rv32i_m/privilege/src/WALLY-sie-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-mie-01", "rv32i_m/privilege/src/WALLY-status-mie-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-sie-01", "rv32i_m/privilege/src/WALLY-status-sie-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-mtvec-01", "rv32i_m/privilege/src/WALLY-status-tw-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-stvec-01", "rv32i_m/privilege/src/WALLY-stvec-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-status-mie-01", "rv32i_m/privilege/src/WALLY-trap-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-status-sie-01", "rv32i_m/privilege/src/WALLY-trap-s-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-trap-sret-01", "rv32i_m/privilege/src/WALLY-trap-sret-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-status-tw-01", "rv32i_m/privilege/src/WALLY-trap-u-01.S/ref/Ref",
"rv32i_m/privilege/WALLY-wfi-01" "rv32i_m/privilege/src/WALLY-wfi-01.S/ref/Ref"
}; };
string wally32periph[] = '{ string wally32periph[] = '{
`WALLYTEST, `WALLYTEST,
"rv32i_m/privilege/WALLY-gpio-01" "rv32i_m/privilege/src/WALLY-gpio-01.S/ref/Ref"
}; };

32
tests/riscof/Makefile
View File

@ -1,20 +1,40 @@
arch_dir = ../../addins/riscv-arch-test arch_dir = ../../addins/riscv-arch-test
wally_dir = ../wally-riscv-arch-test
work_dir = ./riscof_work work_dir = ./riscof_work
work = ./work
arch_workdir = $(work)/riscv-arch-test
wally_workdir = $(work)/wally-riscv-arch-test
current_dir = $(shell pwd) current_dir = $(shell pwd)
XLEN ?= 64 XLEN ?= 64
all: build all: root build_arch build_wally memfile
build: root:
mkdir -p $(work_dir) mkdir -p $(work_dir)
mkdir -p work mkdir -p $(work)
mkdir -p $(arch_workdir)
mkdir -p $(wally_workdir)
sed 's,{0},$(current_dir),g;s,{1},$(XLEN)$(if $(findstring 64,$(XLEN)),gc,imc),g' config.ini > config$(XLEN).ini sed 's,{0},$(current_dir),g;s,{1},$(XLEN)$(if $(findstring 64,$(XLEN)),gc,imc),g' config.ini > config$(XLEN).ini
build_arch:
riscof run --work-dir=$(work_dir) --config=config$(XLEN).ini --suite=$(arch_dir)/riscv-test-suite/ --env=$(arch_dir)/riscv-test-suite/env --no-browser riscof run --work-dir=$(work_dir) --config=config$(XLEN).ini --suite=$(arch_dir)/riscv-test-suite/ --env=$(arch_dir)/riscv-test-suite/env --no-browser
rm -rf work/rv$(XLEN)i_m rm -rf $(arch_workdir)/rv$(XLEN)i_m
mv -f $(work_dir)/rv$(XLEN)i_m work/ mv -f $(work_dir)/rv$(XLEN)i_m $(arch_workdir)/
build_wally:
riscof --verbose debug run --work-dir=$(work_dir) --config=config$(XLEN).ini --suite=$(wally_dir)/riscv-test-suite/ --env=$(wally_dir)/riscv-test-suite/env --no-browser --no-dut-run
rm -rf $(wally_workdir)/rv$(XLEN)i_m
mv -f $(work_dir)/rv$(XLEN)i_m $(wally_workdir)/
memfile:
find $(work) -type f -name "*.elf" | grep "rv64i_m" | while read f; do riscv64-unknown-elf-elf2hex --bit-width 64 --input "$$f" --output "$$f.memfile"; done
find $(work) -type f -name "*.elf" | grep "rv32i_m" | while read f; do riscv64-unknown-elf-elf2hex --bit-width 32 --input "$$f" --output "$$f.memfile"; done
find $(work) -type f -name "*.elf.objdump" | while read f; do extractFunctionRadix.sh $$f; done
clean: clean:
rm -f config64.ini rm -f config64.ini
rm -f config32.ini rm -f config32.ini
rm -rf $(work_dir) rm -rf $(work_dir)
rm -rf work rm -rf $(wally_workdir)
rm -rf $(arch_workdir)

2
tests/riscof/sail_cSim/riscof_sail_cSim.py
View File

@ -101,7 +101,7 @@ class sail_cSim(pluginTemplate):
execute += self.objdump_cmd.format(elf, self.xlen, 'Ref.elf.objdump') execute += self.objdump_cmd.format(elf, self.xlen, 'Ref.elf.objdump')
sig_file = os.path.join(test_dir, self.name[:-1] + ".signature") sig_file = os.path.join(test_dir, self.name[:-1] + ".signature")
execute += self.sail_exe[self.xlen] + ' --test-signature={0} {1} > {2}.log 2>&1;'.format(sig_file, elf, test_name) execute += self.sail_exe[self.xlen] + ' -z268435455 --test-signature={0} {1} > {2}.log 2>&1;'.format(sig_file, elf, test_name)
cov_str = ' ' cov_str = ' '
for label in testentry['coverage_labels']: for label in testentry['coverage_labels']:

7
tests/riscof/spike/spike_rv32imc_isa.yaml
View File

@ -1,11 +1,11 @@
hart_ids: [0] hart_ids: [0]
hart0: hart0:
ISA: RV32IMFCZicsr_Zifencei ISA: RV32IMAFCZicsr_Zifencei
physical_addr_sz: 32 physical_addr_sz: 32
User_Spec_Version: '2.3' User_Spec_Version: '2.3'
supported_xlen: [32] supported_xlen: [32]
misa: misa:
reset-val: 0x40001124 reset-val: 0x40001125
rv32: rv32:
accessible: true accessible: true
mxl: mxl:
@ -23,7 +23,6 @@ hart0:
warl: warl:
dependency_fields: [] dependency_fields: []
legal: legal:
- extensions[25:0] bitmask [0x0001124, 0x0000000] - extensions[25:0] bitmask [0x0001125, 0x0000000]
wr_illegal: wr_illegal:
- Unchanged - Unchanged