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https://github.com/openhwgroup/cvw
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Optomized gshare.
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a5bd78a622
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@ -45,7 +45,7 @@ module speculativegshare
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input logic PCSrcE
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input logic PCSrcE
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);
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);
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logic MatchF, MatchD, MatchE, MatchM;
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logic MatchF, MatchD, MatchE;
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logic MatchNextX, MatchXF;
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logic MatchNextX, MatchXF;
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logic [1:0] TableDirPredictionF, DirPredictionD, DirPredictionE;
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logic [1:0] TableDirPredictionF, DirPredictionD, DirPredictionE;
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@ -57,7 +57,7 @@ module speculativegshare
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logic [k:-1] GHRNextD, OldGHRD;
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logic [k:-1] GHRNextD, OldGHRD;
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logic [k:0] GHRNextE, GHRNextM, GHRNextW;
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logic [k:0] GHRNextE, GHRNextM, GHRNextW;
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logic [k-1:0] IndexNextF, IndexF;
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logic [k-1:0] IndexNextF, IndexF;
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logic [k-1:0] IndexD, IndexE, IndexM;
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logic [k-1:0] IndexD, IndexE;
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logic PCSrcM, PCSrcW;
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logic PCSrcM, PCSrcW;
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logic [`XLEN-1:0] PCW;
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logic [`XLEN-1:0] PCW;
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@ -68,15 +68,14 @@ module speculativegshare
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assign IndexF = GHRF ^ {PCF[k+1] ^ PCF[1], PCF[k:2]};
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assign IndexF = GHRF ^ {PCF[k+1] ^ PCF[1], PCF[k:2]};
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assign IndexD = GHRD[k-1:0] ^ {PCD[k+1] ^ PCD[1], PCD[k:2]};
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assign IndexD = GHRD[k-1:0] ^ {PCD[k+1] ^ PCD[1], PCD[k:2]};
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assign IndexE = GHRE[k-1:0] ^ {PCE[k+1] ^ PCE[1], PCE[k:2]};
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assign IndexE = GHRE[k-1:0] ^ {PCE[k+1] ^ PCE[1], PCE[k:2]};
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assign IndexM = GHRM[k-1:0] ^ {PCM[k+1] ^ PCM[1], PCM[k:2]};
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ram2p1r1wbe #(2**k, 2) PHT(.clk(clk),
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ram2p1r1wbe #(2**k, 2) PHT(.clk(clk),
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.ce1(~StallF | reset), .ce2(~StallW & ~FlushW),
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.ce1(~StallF | reset), .ce2(~StallW & ~FlushW),
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.ra1(IndexNextF),
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.ra1(IndexNextF),
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.rd1(TableDirPredictionF),
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.rd1(TableDirPredictionF),
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.wa2(IndexM),
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.wa2(IndexE),
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.wd2(NewDirPredictionM),
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.wd2(NewDirPredictionE),
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.we2(BranchInstrM & ~StallW & ~FlushW),
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.we2(BranchInstrE & ~StallM & ~FlushM),
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.bwe2(1'b1));
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.bwe2(1'b1));
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// if there are non-flushed branches in the pipeline we need to forward the prediction from that stage to the NextF demi stage
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// if there are non-flushed branches in the pipeline we need to forward the prediction from that stage to the NextF demi stage
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@ -84,15 +83,13 @@ module speculativegshare
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assign MatchF = BranchInstrF & ~FlushD & (IndexNextF == IndexF);
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assign MatchF = BranchInstrF & ~FlushD & (IndexNextF == IndexF);
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assign MatchD = BranchInstrD & ~FlushE & (IndexNextF == IndexD);
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assign MatchD = BranchInstrD & ~FlushE & (IndexNextF == IndexD);
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assign MatchE = BranchInstrE & ~FlushM & (IndexNextF == IndexE);
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assign MatchE = BranchInstrE & ~FlushM & (IndexNextF == IndexE);
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assign MatchM = BranchInstrM & ~FlushW & (IndexNextF == IndexM);
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assign MatchNextX = MatchF | MatchD | MatchE;
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assign MatchNextX = MatchF | MatchD | MatchE | MatchM;
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flopenr #(1) MatchReg(clk, reset, ~StallF, MatchNextX, MatchXF);
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flopenr #(1) MatchReg(clk, reset, ~StallF, MatchNextX, MatchXF);
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assign ForwardNewDirPrediction = MatchF ? NewDirPredictionF :
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assign ForwardNewDirPrediction = MatchF ? NewDirPredictionF :
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MatchD ? NewDirPredictionD :
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MatchD ? NewDirPredictionD :
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MatchE ? NewDirPredictionE :
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NewDirPredictionE ;
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NewDirPredictionM;
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flopenr #(2) ForwardDirPredicitonReg(clk, reset, ~StallF, ForwardNewDirPrediction, ForwardDirPredictionF);
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flopenr #(2) ForwardDirPredicitonReg(clk, reset, ~StallF, ForwardNewDirPrediction, ForwardDirPredictionF);
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