Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

changed DCACHE_LINELENINBITS and ICACHE_LINELENINBITS to 512, had to modigy the wfi test to increase timee before interupt to mantain compatability

Browse Source
This commit is contained in:
DTowersM 2022-06-10 00:37:53 +00:00
parent 5bbdddadf8
commit 4e5d7ec3d6
13 changed files with 25 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
pipelined/config/buildroot/wally-config.vh
View File

@ -63,10 +63,10 @@
// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
`define DCACHE_NUMWAYS 4 `define DCACHE_NUMWAYS 4
`define DCACHE_WAYSIZEINBYTES 4096 `define DCACHE_WAYSIZEINBYTES 4096
`define DCACHE_LINELENINBITS 256 `define DCACHE_LINELENINBITS 512
`define ICACHE_NUMWAYS 4 `define ICACHE_NUMWAYS 4
`define ICACHE_WAYSIZEINBYTES 4096 `define ICACHE_WAYSIZEINBYTES 4096
`define ICACHE_LINELENINBITS 256 `define ICACHE_LINELENINBITS 512
// Integer Divider Configuration // Integer Divider Configuration
// DIV_BITSPERCYCLE must be 1, 2, or 4 // DIV_BITSPERCYCLE must be 1, 2, or 4

4
pipelined/config/fpga/wally-config.vh
View File

@ -65,10 +65,10 @@
// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
`define DCACHE_NUMWAYS 4 `define DCACHE_NUMWAYS 4
`define DCACHE_WAYSIZEINBYTES 4096 `define DCACHE_WAYSIZEINBYTES 4096
`define DCACHE_LINELENINBITS 256 `define DCACHE_LINELENINBITS 512
`define ICACHE_NUMWAYS 4 `define ICACHE_NUMWAYS 4
`define ICACHE_WAYSIZEINBYTES 4096 `define ICACHE_WAYSIZEINBYTES 4096
`define ICACHE_LINELENINBITS 256 `define ICACHE_LINELENINBITS 512
// Integer Divider Configuration // Integer Divider Configuration
// DIV_BITSPERCYCLE must be 1, 2, or 4 // DIV_BITSPERCYCLE must be 1, 2, or 4

4
pipelined/config/rv32e/wally-config.vh
View File

@ -66,10 +66,10 @@
// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
`define DCACHE_NUMWAYS 4 `define DCACHE_NUMWAYS 4
`define DCACHE_WAYSIZEINBYTES 4096 `define DCACHE_WAYSIZEINBYTES 4096
`define DCACHE_LINELENINBITS 256 `define DCACHE_LINELENINBITS 512
`define ICACHE_NUMWAYS 4 `define ICACHE_NUMWAYS 4
`define ICACHE_WAYSIZEINBYTES 4096 `define ICACHE_WAYSIZEINBYTES 4096
`define ICACHE_LINELENINBITS 256 `define ICACHE_LINELENINBITS 512
// Integer Divider Configuration // Integer Divider Configuration
// DIV_BITSPERCYCLE must be 1, 2, or 4 // DIV_BITSPERCYCLE must be 1, 2, or 4

4
pipelined/config/rv32gc/wally-config.vh
View File

@ -64,10 +64,10 @@
// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
`define DCACHE_NUMWAYS 4 `define DCACHE_NUMWAYS 4
`define DCACHE_WAYSIZEINBYTES 4096 `define DCACHE_WAYSIZEINBYTES 4096
`define DCACHE_LINELENINBITS 256 `define DCACHE_LINELENINBITS 512
`define ICACHE_NUMWAYS 4 `define ICACHE_NUMWAYS 4
`define ICACHE_WAYSIZEINBYTES 4096 `define ICACHE_WAYSIZEINBYTES 4096
`define ICACHE_LINELENINBITS 256 `define ICACHE_LINELENINBITS 512
// Integer Divider Configuration // Integer Divider Configuration
// DIV_BITSPERCYCLE must be 1, 2, or 4 // DIV_BITSPERCYCLE must be 1, 2, or 4

4
pipelined/config/rv32i/wally-config.vh
View File

@ -66,10 +66,10 @@
// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
`define DCACHE_NUMWAYS 4 `define DCACHE_NUMWAYS 4
`define DCACHE_WAYSIZEINBYTES 4096 `define DCACHE_WAYSIZEINBYTES 4096
`define DCACHE_LINELENINBITS 256 `define DCACHE_LINELENINBITS 512
`define ICACHE_NUMWAYS 4 `define ICACHE_NUMWAYS 4
`define ICACHE_WAYSIZEINBYTES 4096 `define ICACHE_WAYSIZEINBYTES 4096
`define ICACHE_LINELENINBITS 256 `define ICACHE_LINELENINBITS 512
// Integer Divider Configuration // Integer Divider Configuration
// DIV_BITSPERCYCLE must be 1, 2, or 4 // DIV_BITSPERCYCLE must be 1, 2, or 4

4
pipelined/config/rv32ic/wally-config.vh
View File

@ -64,10 +64,10 @@
// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
`define DCACHE_NUMWAYS 4 `define DCACHE_NUMWAYS 4
`define DCACHE_WAYSIZEINBYTES 4096 `define DCACHE_WAYSIZEINBYTES 4096
`define DCACHE_LINELENINBITS 256 `define DCACHE_LINELENINBITS 512
`define ICACHE_NUMWAYS 4 `define ICACHE_NUMWAYS 4
`define ICACHE_WAYSIZEINBYTES 4096 `define ICACHE_WAYSIZEINBYTES 4096
`define ICACHE_LINELENINBITS 256 `define ICACHE_LINELENINBITS 512
// Integer Divider Configuration // Integer Divider Configuration
// DIV_BITSPERCYCLE must be 1, 2, or 4 // DIV_BITSPERCYCLE must be 1, 2, or 4

4
pipelined/config/rv64BP/wally-config.vh
View File

@ -66,10 +66,10 @@
// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
`define DCACHE_NUMWAYS 4 `define DCACHE_NUMWAYS 4
`define DCACHE_WAYSIZEINBYTES 4096 `define DCACHE_WAYSIZEINBYTES 4096
`define DCACHE_LINELENINBITS 256 `define DCACHE_LINELENINBITS 512
`define ICACHE_NUMWAYS 4 `define ICACHE_NUMWAYS 4
`define ICACHE_WAYSIZEINBYTES 4096 `define ICACHE_WAYSIZEINBYTES 4096
`define ICACHE_LINELENINBITS 256 `define ICACHE_LINELENINBITS 512
// Legal number of PMP entries are 0, 16, or 64 // Legal number of PMP entries are 0, 16, or 64
`define PMP_ENTRIES 64 `define PMP_ENTRIES 64

4
pipelined/config/rv64fp/wally-config.vh
View File

@ -66,10 +66,10 @@
// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
`define DCACHE_NUMWAYS 4 `define DCACHE_NUMWAYS 4
`define DCACHE_WAYSIZEINBYTES 4096 `define DCACHE_WAYSIZEINBYTES 4096
`define DCACHE_LINELENINBITS 256 `define DCACHE_LINELENINBITS 512
`define ICACHE_NUMWAYS 4 `define ICACHE_NUMWAYS 4
`define ICACHE_WAYSIZEINBYTES 4096 `define ICACHE_WAYSIZEINBYTES 4096
`define ICACHE_LINELENINBITS 256 `define ICACHE_LINELENINBITS 512
// Integer Divider Configuration // Integer Divider Configuration
// DIV_BITSPERCYCLE must be 1, 2, or 4 // DIV_BITSPERCYCLE must be 1, 2, or 4

4
pipelined/config/rv64fpquad/wally-config.vh
View File

@ -65,10 +65,10 @@
// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
`define DCACHE_NUMWAYS 4 `define DCACHE_NUMWAYS 4
`define DCACHE_WAYSIZEINBYTES 4096 `define DCACHE_WAYSIZEINBYTES 4096
`define DCACHE_LINELENINBITS 256 `define DCACHE_LINELENINBITS 512
`define ICACHE_NUMWAYS 4 `define ICACHE_NUMWAYS 4
`define ICACHE_WAYSIZEINBYTES 4096 `define ICACHE_WAYSIZEINBYTES 4096
`define ICACHE_LINELENINBITS 256 `define ICACHE_LINELENINBITS 512
// Integer Divider Configuration // Integer Divider Configuration
// DIV_BITSPERCYCLE must be 1, 2, or 4 // DIV_BITSPERCYCLE must be 1, 2, or 4

4
pipelined/config/rv64gc/wally-config.vh
View File

@ -65,10 +65,10 @@
// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
`define DCACHE_NUMWAYS 4 `define DCACHE_NUMWAYS 4
`define DCACHE_WAYSIZEINBYTES 4096 `define DCACHE_WAYSIZEINBYTES 4096
`define DCACHE_LINELENINBITS 256 `define DCACHE_LINELENINBITS 512
`define ICACHE_NUMWAYS 4 `define ICACHE_NUMWAYS 4
`define ICACHE_WAYSIZEINBYTES 4096 `define ICACHE_WAYSIZEINBYTES 4096
`define ICACHE_LINELENINBITS 256 `define ICACHE_LINELENINBITS 512
// Integer Divider Configuration // Integer Divider Configuration
// DIV_BITSPERCYCLE must be 1, 2, or 4 // DIV_BITSPERCYCLE must be 1, 2, or 4

4
pipelined/config/rv64i/wally-config.vh
View File

@ -65,10 +65,10 @@
// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
`define DCACHE_NUMWAYS 4 `define DCACHE_NUMWAYS 4
`define DCACHE_WAYSIZEINBYTES 4096 `define DCACHE_WAYSIZEINBYTES 4096
`define DCACHE_LINELENINBITS 256 `define DCACHE_LINELENINBITS 512
`define ICACHE_NUMWAYS 4 `define ICACHE_NUMWAYS 4
`define ICACHE_WAYSIZEINBYTES 4096 `define ICACHE_WAYSIZEINBYTES 4096
`define ICACHE_LINELENINBITS 256 `define ICACHE_LINELENINBITS 512
// Integer Divider Configuration // Integer Divider Configuration
// DIV_BITSPERCYCLE must be 1, 2, or 4 // DIV_BITSPERCYCLE must be 1, 2, or 4

4
pipelined/config/rv64ic/wally-config.vh
View File

@ -65,10 +65,10 @@
// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
`define DCACHE_NUMWAYS 4 `define DCACHE_NUMWAYS 4
`define DCACHE_WAYSIZEINBYTES 4096 `define DCACHE_WAYSIZEINBYTES 4096
`define DCACHE_LINELENINBITS 256 `define DCACHE_LINELENINBITS 512
`define ICACHE_NUMWAYS 4 `define ICACHE_NUMWAYS 4
`define ICACHE_WAYSIZEINBYTES 4096 `define ICACHE_WAYSIZEINBYTES 4096
`define ICACHE_LINELENINBITS 256 `define ICACHE_LINELENINBITS 512
// Integer Divider Configuration // Integer Divider Configuration
// DIV_BITSPERCYCLE must be 1, 2, or 4 // DIV_BITSPERCYCLE must be 1, 2, or 4

2
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-wfi-01.S
View File

@ -33,7 +33,7 @@ WRITE_READ_CSR mie, 0xFFF // Enable interrupts from all sources
// Code copied from test library to cause m time interrupt, with time loop replaced with wfi. // Code copied from test library to cause m time interrupt, with time loop replaced with wfi.
li x28, 0x40 // Desired offset from the present time li x28, 0x50 // Desired offset from the present time
mv a3, x28 // copy value in to know to stop waiting for interrupt after this many cycles mv a3, x28 // copy value in to know to stop waiting for interrupt after this many cycles
la x29, 0x02004000 // MTIMECMP register in CLINT la x29, 0x02004000 // MTIMECMP register in CLINT
la x30, 0x0200BFF8 // MTIME register in CLINT la x30, 0x0200BFF8 // MTIME register in CLINT