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added logic to prevent cache line length from exceeding the max size of a burst.

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slmnemo 2022-05-25 17:03:15 -07:00
parent 51debfa186
commit 4e5505f301
1 changed files with 1 additions and 0 deletions
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pipelined/testbench/testbench.sv
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@ -373,6 +373,7 @@ module riscvassertions;
assert (`IMEM == `MEM_CACHE | `VIRTMEM_SUPPORTED ==0) else $error("Virtual memory needs icache");
//assert (`DMEM == `MEM_CACHE | `DBUS ==0) else $error("Dcache rquires DBUS.");
//assert (`IMEM == `MEM_CACHE | `IBUS ==0) else $error("Icache rquires IBUS.");
assert (`DCACHE_LINELENINBITS <= `XLEN*16 | (`DMEM != `MEM_CACHE)) else $error("DCACHE_LINELENINBITS must not exceed 16 words because max AHB burst size is 16");
end
endmodule