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https://github.com/openhwgroup/cvw
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Update lsu.sv
Program clean up
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@ -132,7 +132,6 @@ module lsu import cvw::*; #(parameter cvw_t P) (
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logic IgnoreRequest; // On FlushM or TLB miss ignore memory operation
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logic SelDTIM; // Select DTIM rather than bus or D$
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/////////////////////////////////////////////////////////////////////////////////////////////
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// Pipeline for IEUAdr E to M
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// Zero-extend address to 34 bits for XLEN=32
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@ -320,6 +319,7 @@ module lsu import cvw::*; #(parameter cvw_t P) (
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/////////////////////////////////////////////////////////////////////////////////////////////
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// Atomic operations
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/////////////////////////////////////////////////////////////////////////////////////////////
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if (P.A_SUPPORTED) begin:atomic
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atomic #(P) atomic(.clk, .reset, .StallW, .ReadDataM(ReadDataM[P.XLEN-1:0]), .IHWriteDataM, .PAdrM,
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.LSUFunct7M, .LSUFunct3M, .LSUAtomicM, .PreLSURWM, .IgnoreRequest,
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@ -335,6 +335,7 @@ module lsu import cvw::*; #(parameter cvw_t P) (
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/////////////////////////////////////////////////////////////////////////////////////////////
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// Subword Accesses
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/////////////////////////////////////////////////////////////////////////////////////////////
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subwordread #(P.LLEN) subwordread(.ReadDataWordMuxM(LittleEndianReadDataWordM), .PAdrM(PAdrM[2:0]), .BigEndianM,
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.FpLoadStoreM, .Funct3M(LSUFunct3M), .ReadDataM);
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subwordwrite #(P.LLEN) subwordwrite(.LSUFunct3M, .IMAFWriteDataM, .LittleEndianWriteDataM);
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@ -361,5 +362,4 @@ module lsu import cvw::*; #(parameter cvw_t P) (
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assign LSUWriteDataM = LittleEndianWriteDataM;
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assign LittleEndianReadDataWordM = ReadDataWordMuxM;
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end
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endmodule
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