From 4c1a07eb9cbef0c55c51acd2fe938125ea7740cf Mon Sep 17 00:00:00 2001 From: Harshini Srinath <93847878+harshinisrinath1001@users.noreply.github.com> Date: Sun, 30 Jul 2023 18:06:25 -0700 Subject: [PATCH] Fixed formatting --- src/fpu/postproc/normshift.sv | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/fpu/postproc/normshift.sv b/src/fpu/postproc/normshift.sv index f80230219..f24a75fe1 100644 --- a/src/fpu/postproc/normshift.sv +++ b/src/fpu/postproc/normshift.sv @@ -27,47 +27,47 @@ //////////////////////////////////////////////////////////////////////////////////////////////// // convert shift - // fp -> int: | `XLEN zeros | Mantissa | 0's if nessisary | << CalcExp + // fp -> int: | `XLEN zeros | Mantissa | 0's if necessary | << CalcExp // process: // - start - CalcExp = 1 + XExp - Largest Bias - // | `XLEN zeros | Mantissa | 0's if nessisary | + // | `XLEN zeros | Mantissa | 0's if necessary | // // - shift left 1 (1) - // | `XLEN-1 zeros |bit| frac | 0's if nessisary | + // | `XLEN-1 zeros |bit| frac | 0's if necessary | // . <- binary point // // - shift left till unbiased exponent is 0 (XExp - Largest Bias) - // | 0's | Mantissa | 0's if nessisary | + // | 0's | Mantissa | 0's if necessary | // | keep | // // fp -> fp: // - if result is subnormal or underflowed: - // | `NF-1 zeros | Mantissa | 0's if nessisary | << NF+CalcExp-1 + // | `NF-1 zeros | Mantissa | 0's if necessary | << NF+CalcExp-1 // process: // - start // | mantissa | 0's | // // - shift right by NF-1 (NF-1) - // | `NF-1 zeros | mantissa | 0's | + // | `NF-1 zeros | mantissa | 0's | // // - shift left by CalcExp = XExp - Largest bias + new bias // | 0's | mantissa | 0's | // | keep | // // - if the input is subnormal: - // | lzcIn | 0's if nessisary | << ZeroCnt+1 + // | lzcIn | 0's if necessary | << ZeroCnt+1 // - plus 1 to shift out the first 1 // - // int -> fp: | lzcIn | 0's if nessisary | << ZeroCnt+1 + // int -> fp: | lzcIn | 0's if necessary | << ZeroCnt+1 // - plus 1 to shift out the first 1 // fma shift - // | 00 | Sm | << LZA output + // | 00 | Sm | << LZA output // . // - two extra bits so we can correct for an LZA error of 1 or 2 // divsqrt shift - // | Nf 0's | Qm | << calculated shift amount + // | Nf 0's | Qm | << calculated shift amount // . module normshift import cvw::*; #(parameter cvw_t P) (