mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
Merge branch 'main' of https://github.com/openhwgroup/cvw
This commit is contained in:
Roman De Santos
commit
4b7d3a7666
16
.github/workflows/install.yml
vendored
16
.github/workflows/install.yml
vendored
@ -127,9 +127,9 @@ jobs:
|
||||
run: |
|
||||
df -h
|
||||
if [ -z ${{ matrix.image }} ]; then
|
||||
./.github/cli-space-cleanup.sh
|
||||
./.github/scripts/cli-space-cleanup.sh
|
||||
else
|
||||
nsenter -t 1 -m -u -n -i bash -c "$(cat .github/cli-space-cleanup.sh)"
|
||||
nsenter -t 1 -m -u -n -i bash -c "$(cat .github/scripts/cli-space-cleanup.sh)"
|
||||
fi
|
||||
df -h
|
||||
# Run main tool chain installation script, either as a user or system wide
|
||||
@ -159,16 +159,18 @@ jobs:
|
||||
with:
|
||||
name: installation-logs-${{ matrix.name }}
|
||||
path: ${{ env.RISCV }}/logs/
|
||||
# Only the linux-testvectors are needed, so remove the rest of the buildroot to save space
|
||||
# Logs have already been uploaded so they can be removed
|
||||
- name: Clean up installation
|
||||
run: |
|
||||
rm -rf $RISCV/buildroot/ || sudo rm -rf $RISCV/buildroot/
|
||||
rm -rf $RISCV/logs || sudo rm -rf $RISCV/logs
|
||||
df -h
|
||||
# Make riscof and zsbl only as that is the only testsuite used by standard regression
|
||||
- name: make tests
|
||||
run: |
|
||||
source setup.sh
|
||||
make riscof zsbl --jobs $(nproc --ignore 1)
|
||||
# Only the linux-testvectors are needed, so remove the rest of the buildroot to save space
|
||||
- name: Remove Buildroot to Save Space
|
||||
run: |
|
||||
rm -rf $RISCV/buildroot/output/build || sudo rm -rf $RISCV/buildroot/output/build
|
||||
df -h
|
||||
# Run standard regression, skipping distros that are known to be broken with Verilator
|
||||
- name: Regression
|
||||
if: ${{ matrix.regressionFail != true }}
|
||||
|
||||
@ -57,7 +57,7 @@ standard_tests = [
|
||||
|
||||
# Separate test for short buildroot run through OpenSBI UART output
|
||||
tests_buildrootshort = [
|
||||
["buildroot", ["buildroot"], "--args +INSTR_LIMIT=1400000", # Instruction limit gets to first OpenSBI UART output
|
||||
["buildroot", ["buildroot"], "--args +INSTR_LIMIT=1600000", # Instruction limit gets to first OpenSBI UART output
|
||||
"OpenSBI v", "buildroot_uart.out"]
|
||||
]
|
||||
|
||||
@ -479,12 +479,13 @@ def makeDirs(sims):
|
||||
for sim in sims:
|
||||
dirs = [f"{regressionDir}/{sim}/wkdir", f"{regressionDir}/{sim}/logs"]
|
||||
for d in dirs:
|
||||
shutil.rmtree(d)
|
||||
shutil.rmtree(d, ignore_errors=True)
|
||||
os.makedirs(d, exist_ok=True)
|
||||
|
||||
|
||||
def main(args):
|
||||
sims, coverStr, TIMEOUT_DUR = process_args(args)
|
||||
makeDirs(sims)
|
||||
configs = selectTests(args, sims, coverStr)
|
||||
# Scale the number of concurrent processes to the number of test cases, but
|
||||
# max out at a limited number of concurrent processes to not overwhelm the system
|
||||
|
||||
@ -99,7 +99,7 @@ git_check() {
|
||||
|
||||
# Log output to a file and only print lines with keywords
|
||||
logger() {
|
||||
local log_file="$RISCV/logs/$1.log"
|
||||
local log_file="$RISCV/logs/$STATUS.log"
|
||||
local keyword_pattern="(\bwarning|\berror|\bfail|\bsuccess|\bstamp|\bdoesn't work)"
|
||||
local exclude_pattern="(_warning|warning_|_error|error_|-warning|warning-|-error|error-|Werror|error\.o|warning flags)"
|
||||
|
||||
@ -126,6 +126,8 @@ fi
|
||||
|
||||
# Determine script directory to locate related scripts
|
||||
dir="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
|
||||
WALLY=$(dirname "$dir")
|
||||
export WALLY
|
||||
|
||||
# Get Linux distro and version
|
||||
source "${dir}"/wally-distro-check.sh
|
||||
@ -181,7 +183,7 @@ echo "Using $NUM_THREADS thread(s) for compilation"
|
||||
mkdir -p "$RISCV"/logs
|
||||
|
||||
# Install/update system packages if root. Otherwise, check that packages are already installed.
|
||||
STATUS="system packages"
|
||||
STATUS="system_packages"
|
||||
if [ "$ROOT" == true ]; then
|
||||
source "${dir}"/wally-package-install.sh
|
||||
else
|
||||
@ -209,7 +211,7 @@ fi
|
||||
# Create python virtual environment so the python command targets desired version of python
|
||||
# and installed packages are isolated from the rest of the system.
|
||||
section_header "Setting up Python Environment"
|
||||
STATUS="python virtual environment"
|
||||
STATUS="python_virtual_environment"
|
||||
cd "$RISCV"
|
||||
if [ ! -e "$RISCV"/riscv-python/bin/activate ]; then
|
||||
"$PYTHON_VERSION" -m venv riscv-python --prompt cvw
|
||||
@ -242,8 +244,8 @@ if (( RHEL_VERSION == 8 )) || (( UBUNTU_VERSION == 20 )); then
|
||||
rm -f glib-2.70.5.tar.xz
|
||||
cd glib-2.70.5
|
||||
meson setup _build --prefix="$RISCV"
|
||||
meson compile -C _build -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
meson install -C _build 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
meson compile -C _build -j "${NUM_THREADS}" 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
meson install -C _build 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
cd "$RISCV"
|
||||
rm -rf glib-2.70.5
|
||||
echo -e "${SUCCESS_COLOR}glib successfully installed!${ENDC}"
|
||||
@ -261,8 +263,8 @@ if (( RHEL_VERSION == 8 )); then
|
||||
rm -f gmp-6.3.0.tar.xz
|
||||
cd gmp-6.3.0
|
||||
./configure --prefix="$RISCV"
|
||||
make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make -j "${NUM_THREADS}" 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make install 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
cd "$RISCV"
|
||||
rm -rf gmp-6.3.0
|
||||
echo -e "${SUCCESS_COLOR}gmp successfully installed!${ENDC}"
|
||||
@ -284,6 +286,21 @@ if (( UBUNTU_VERSION == 20 || DEBIAN_VERSION == 11 )) || [ "$FAMILY" == suse ];
|
||||
fi
|
||||
fi
|
||||
|
||||
# Newer version of CMake needed to build sail-riscv model (at least 3.20)
|
||||
if (( UBUNTU_VERSION == 20 || DEBIAN_VERSION == 11 )); then
|
||||
STATUS="cmake"
|
||||
if [ ! -e "$RISCV"/bin/cmake ]; then
|
||||
section_header "Installing cmake"
|
||||
cd "$RISCV"
|
||||
wget -nv --retry-connrefused $retry_on_host_error --output-document=cmake.tar.gz https://github.com/Kitware/CMake/releases/download/v3.31.5/cmake-3.31.5-linux-x86_64.tar.gz
|
||||
tar xz --directory="$RISCV" --strip-components=1 -f cmake.tar.gz
|
||||
rm -f cmake.tar.gz
|
||||
echo -e "${SUCCESS_COLOR}CMake successfully installed/updated!${ENDC}"
|
||||
else
|
||||
echo -e "${SUCCESS_COLOR}CMake already installed.${ENDC}"
|
||||
fi
|
||||
fi
|
||||
|
||||
# RISC-V GNU Toolchain (https://github.com/riscv-collab/riscv-gnu-toolchain)
|
||||
# The RISC-V GNU Toolchain includes the GNU Compiler Collection (gcc), GNU Binutils, Newlib,
|
||||
# and the GNU Debugger Project (gdb). It is a collection of tools used to compile RISC-V programs.
|
||||
@ -297,7 +314,7 @@ if git_check "riscv-gnu-toolchain" "https://github.com/riscv/riscv-gnu-toolchain
|
||||
cd "$RISCV"/riscv-gnu-toolchain
|
||||
git reset --hard && git clean -f && git checkout master && git pull && git submodule update
|
||||
./configure --prefix="${RISCV}" --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;"
|
||||
make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make -j "${NUM_THREADS}" 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
if [ "$clean" ]; then
|
||||
cd "$RISCV"
|
||||
rm -rf riscv-gnu-toolchain
|
||||
@ -324,8 +341,8 @@ if git_check "elf2hex" "https://github.com/sifive/elf2hex.git" "$RISCV/bin/riscv
|
||||
git reset --hard && git clean -f && git checkout master && git pull
|
||||
autoreconf -i
|
||||
./configure --target=riscv64-unknown-elf --prefix="$RISCV"
|
||||
make 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make install 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
if [ "$clean" ]; then
|
||||
cd "$RISCV"
|
||||
rm -rf elf2hex
|
||||
@ -345,8 +362,8 @@ if git_check "qemu" "https://github.com/qemu/qemu" "$RISCV/include/qemu-plugin.h
|
||||
cd "$RISCV"/qemu
|
||||
git reset --hard && git clean -f && git checkout master && git pull
|
||||
./configure --target-list=riscv64-softmmu --prefix="$RISCV"
|
||||
make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make -j "${NUM_THREADS}" 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make install 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
if [ "$clean" ]; then
|
||||
cd "$RISCV"
|
||||
rm -rf qemu
|
||||
@ -368,8 +385,8 @@ if git_check "riscv-isa-sim" "https://github.com/riscv-software-src/riscv-isa-si
|
||||
mkdir -p build
|
||||
cd build
|
||||
../configure --prefix="$RISCV"
|
||||
make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make -j "${NUM_THREADS}" 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make install 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
if [ "$clean" ]; then
|
||||
cd "$RISCV"
|
||||
rm -rf riscv-isa-sim
|
||||
@ -393,8 +410,8 @@ if git_check "verilator" "https://github.com/verilator/verilator" "$RISCV/share/
|
||||
git reset --hard && git clean -f && git checkout master && git pull
|
||||
autoconf
|
||||
./configure --prefix="$RISCV"
|
||||
make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make -j "${NUM_THREADS}" 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make install 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
if [ "$clean" ]; then
|
||||
cd "$RISCV"
|
||||
rm -rf verilator
|
||||
@ -411,7 +428,7 @@ fi
|
||||
# The Sail Compiler is written in OCaml, which is an object-oriented extension of ML, which in turn
|
||||
# is a functional programming language suited to formal verification.
|
||||
section_header "Installing/Updating Sail Compiler"
|
||||
STATUS="Sail Compiler"
|
||||
STATUS="sail_compiler"
|
||||
if [ ! -e "$RISCV"/bin/sail ]; then
|
||||
cd "$RISCV"
|
||||
wget -nv --retry-connrefused $retry_on_host_error --output-document=sail.tar.gz https://github.com/rems-project/sail/releases/latest/download/sail.tar.gz
|
||||
@ -426,13 +443,13 @@ fi
|
||||
# The RISC-V Sail Model is the golden reference model for RISC-V. It is written in Sail (described above)
|
||||
section_header "Installing/Updating RISC-V Sail Model"
|
||||
STATUS="riscv-sail-model"
|
||||
if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/riscv_sim_RV32"; then
|
||||
if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/riscv_sim_rv32d"; then
|
||||
cd "$RISCV"/sail-riscv
|
||||
git reset --hard && git clean -f && git checkout master && git pull
|
||||
ARCH=RV64 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV64 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
ARCH=RV32 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV32 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
cp -f c_emulator/riscv_sim_RV64 "$RISCV"/bin/riscv_sim_RV64
|
||||
cp -f c_emulator/riscv_sim_RV32 "$RISCV"/bin/riscv_sim_RV32
|
||||
cmake -S . -B build -DCMAKE_BUILD_TYPE=RelWithDebInfo -GNinja 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
cmake --build build 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
cp -f build/c_emulator/riscv_sim_rv64d "$RISCV"/bin/riscv_sim_rv64d
|
||||
cp -f build/c_emulator/riscv_sim_rv32d "$RISCV"/bin/riscv_sim_rv32d
|
||||
if [ "$clean" ]; then
|
||||
cd "$RISCV"
|
||||
rm -rf sail-riscv
|
||||
@ -446,7 +463,7 @@ fi
|
||||
# OSU Skywater 130 cell library (https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12)
|
||||
# The OSU Skywater 130 cell library is a standard cell library that is used to synthesize Wally.
|
||||
section_header "Installing/Updating OSU Skywater 130 cell library"
|
||||
STATUS="OSU Skywater 130 cell library"
|
||||
STATUS="osu_skywater_130_cell_library"
|
||||
mkdir -p "$RISCV"/cad/lib
|
||||
cd "$RISCV"/cad/lib
|
||||
if git_check "sky130_osu_sc_t12" "https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12" "$RISCV/cad/lib/sky130_osu_sc_t12" "main"; then
|
||||
@ -471,11 +488,11 @@ if [ ! "$no_buidroot" ]; then
|
||||
fi
|
||||
cd "$dir"/../linux
|
||||
if [ ! -e "$RISCV"/buildroot ]; then
|
||||
make 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
FORCE_UNSAFE_CONFIGURE=1 make 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ] # FORCE_UNSAFE_CONFIGURE is needed to allow buildroot to compile when run as root
|
||||
echo -e "${SUCCESS_COLOR}Buildroot successfully installed and Linux testvectors created!${ENDC}"
|
||||
elif [ ! -e "$RISCV"/linux-testvectors ]; then
|
||||
echo -e "${OK_COLOR}Buildroot already exists, but Linux testvectors are missing. Generating them now.${ENDC}"
|
||||
make dumptvs 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
make dumptvs 2>&1 | logger; [ "${PIPESTATUS[0]}" == 0 ]
|
||||
echo -e "${SUCCESS_COLOR}Linux testvectors successfully generated!${ENDC}"
|
||||
else
|
||||
echo -e "${OK_COLOR}Buildroot and Linux testvectors already exist.${ENDC}"
|
||||
@ -489,7 +506,7 @@ fi
|
||||
# The site-setup script is used to set up the environment for the RISC-V tools and EDA tools by setting
|
||||
# the PATH and other environment variables. It also sources the Python virtual environment.
|
||||
section_header "Downloading Site Setup Script"
|
||||
STATUS="site-setup scripts"
|
||||
STATUS="site-setup_scripts"
|
||||
cd "$RISCV"
|
||||
if [ ! -e "${RISCV}"/site-setup.sh ]; then
|
||||
wget -nv --retry-connrefused $retry_on_host_error https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.sh
|
||||
|
||||
150
linux/Makefile
150
linux/Makefile
@ -1,34 +1,43 @@
|
||||
BUILDROOT := buildroot
|
||||
IMAGES := ${BUILDROOT}/output/images
|
||||
WALLYLINUX := $(WALLY)/linux
|
||||
DIS := ${IMAGES}/disassembly
|
||||
BUILDROOT := buildroot
|
||||
IMAGE_DIR := ${BUILDROOT}/output/images
|
||||
DISASSEMBLY_DIR := ${IMAGE_DIR}/disassembly
|
||||
WALLYLINUX := $(WALLY)/linux
|
||||
BR2_EXTERNAL_TREE := $(WALLYLINUX)/br2-external-tree
|
||||
LINUX_TESTVECTORS := $(RISCV)/linux-testvectors
|
||||
|
||||
# set sudo if needed depending on $RISCV
|
||||
SUDO := $(shell mkdir -p $(RISCV)/.test > /dev/null 2>&1 || echo sudo)
|
||||
BUILDROOT_OUTPUTS := Image fw_jump.bin fw_jump.elf rootfs.cpio vmlinux busybox
|
||||
BUILDROOT_OUTPUTS := $(foreach name, $(BUILDROOT_OUTPUTS), $(IMAGE_DIR)/$(name))
|
||||
|
||||
# Device tree files
|
||||
DTS ?= $(shell find devicetree -type f -regex ".*\.dts" | sort)
|
||||
DTB := $(DTS:%.dts=%.dtb)
|
||||
DTB := $(foreach name, $(DTB), $(IMAGES)/$(shell basename $(name)))
|
||||
DTS ?= $(wildcard devicetree/*.dts)
|
||||
DTB := $(foreach name, $(DTS:%.dts=%.dtb), $(IMAGE_DIR)/$(notdir $(name)))
|
||||
|
||||
# Disassembly stuff
|
||||
# Disassembly files
|
||||
BINARIES := fw_jump.elf vmlinux busybox
|
||||
OBJDUMPS := $(foreach name, $(BINARIES), $(basename $(name) .elf))
|
||||
OBJDUMPS := $(foreach name, $(OBJDUMPS), $(DIS)/$(name).objdump)
|
||||
OBJDUMPS := $(foreach name, $(basename $(BINARIES) .elf), $(DISASSEMBLY_DIR)/$(name).objdump)
|
||||
|
||||
.PHONY: all generate disassemble install clean cleanDTB check_write_permissions check_environment
|
||||
# Testvector files
|
||||
RAW_RAM_FILE := ${LINUX_TESTVECTORS}/ramGDB.bin
|
||||
RAM_FILE := ${LINUX_TESTVECTORS}/ram.bin
|
||||
RAW_BOOTMEM_FILE := ${LINUX_TESTVECTORS}/bootmemGDB.bin
|
||||
BOOTMEM_FILE := ${LINUX_TESTVECTORS}/bootmem.bin
|
||||
|
||||
all: check_environment check_write_permissions clean download Image disassemble install dumptvs
|
||||
.PHONY: all check_environment check_write_permissions config build disassemble devicetrees install dumptvs clean cleanDTB
|
||||
|
||||
check_environment: $(RISCV)
|
||||
# Default target
|
||||
all: check_write_permissions clean config build disassemble install dumptvs
|
||||
|
||||
# Check if the environment variables are set correctly
|
||||
check_environment: $(RISCV) $(WALLY)
|
||||
ifeq ($(findstring :$(RISCV)/lib:,:$(LD_LIBRARY_PATH):),)
|
||||
@(echo "ERROR: Your environment variables are not set correctly." >&2 \
|
||||
&& echo "Make sure to source setup.sh or install buildroot using the wally-tool-chain-install.sh script." >&2 \
|
||||
&& exit 1)
|
||||
endif
|
||||
|
||||
check_write_permissions:
|
||||
# Check if the user has write permissions to the RISCV directory, potentially using sudo
|
||||
SUDO := $(shell mkdir -p $(RISCV)/.test > /dev/null 2>&1 || echo sudo)
|
||||
check_write_permissions: check_environment
|
||||
ifeq ($(SUDO), sudo)
|
||||
@echo "Cannot write to '$(RISCV)'." \
|
||||
"Using sudo (you may be prompted for your password several times throughout the install)"
|
||||
@ -38,75 +47,92 @@ endif
|
||||
&& exit 1)
|
||||
@$(SUDO) rm -r $(RISCV)/.test
|
||||
|
||||
Image: check_environment
|
||||
bash -c "unset LD_LIBRARY_PATH; $(MAKE) -C $(BUILDROOT)"
|
||||
$(MAKE) generate
|
||||
@echo "Buildroot Image successfully generated."
|
||||
# Build buildroot and device tree binaries
|
||||
build: $(BUILDROOT_OUTPUTS) devicetrees
|
||||
|
||||
install: check_write_permissions check_environment
|
||||
# Build buildroot itself
|
||||
# LD_LIBRARY_PATH must be unset to avoid conflicts between the host and cross compiler
|
||||
$(BUILDROOT_OUTPUTS) $(IMAGE_DIR): check_environment $(BUILDROOT)
|
||||
bash -c "unset LD_LIBRARY_PATH; $(MAKE) -C $(BUILDROOT)"
|
||||
|
||||
# Install buildroot to $RISCV
|
||||
install: check_write_permissions
|
||||
$(SUDO) rm -rf $(RISCV)/$(BUILDROOT)
|
||||
$(SUDO) mv $(BUILDROOT) $(RISCV)/$(BUILDROOT)
|
||||
@echo "Buildroot successfully installed."
|
||||
|
||||
dumptvs: check_write_permissions check_environment
|
||||
$(SUDO) mkdir -p $(RISCV)/linux-testvectors
|
||||
./genInitMem.sh
|
||||
@echo "Testvectors successfully generated."
|
||||
# Generate linux boot testvectors
|
||||
dumptvs: ${RAM_FILE} ${BOOTMEM_FILE}
|
||||
|
||||
generate: $(DTB) $(IMAGES)
|
||||
# Format QEMU memory dumps for use as testvectors
|
||||
${LINUX_TESTVECTORS}/%.bin: ${LINUX_TESTVECTORS}/%GDB.bin
|
||||
truncate -s %8 $^ # Extend file to 8 byte multiple
|
||||
objcopy --reverse-bytes=8 -F binary $^ $@ # Reverse bytes
|
||||
|
||||
$(IMAGES)/%.dtb: ./devicetree/%.dts
|
||||
# Generate memory dumps from QEMU buildroot boot
|
||||
TCP_PORT := 1235
|
||||
${LINUX_TESTVECTORS}/%GDB.bin: | $(LINUX_TESTVECTORS)
|
||||
${WALLYLINUX}/qemuBoot.sh --gdb ${TCP_PORT} &
|
||||
riscv64-unknown-elf-gdb -batch \
|
||||
-ex "target remote :${TCP_PORT}" \
|
||||
-ex "maintenance packet Qqemu.PhyMemMode:1" \
|
||||
-ex "printf \"Creating ${RAW_BOOTMEM_FILE}\n\"" \
|
||||
-ex "dump binary memory ${RAW_BOOTMEM_FILE} 0x1000 0x1fff" \
|
||||
-ex "printf \"Creating ${RAW_RAM_FILE}\n\"" \
|
||||
-ex "dump binary memory ${RAW_RAM_FILE} 0x80000000 0x8fffffff" \
|
||||
-ex "kill"
|
||||
|
||||
# Generate device tree binaries
|
||||
devicetrees: $(DTB)
|
||||
$(IMAGE_DIR)/%.dtb: ${WALLYLINUX}/devicetree/%.dts | $(IMAGE_DIR)
|
||||
dtc -I dts -O dtb $< > $@
|
||||
|
||||
$(IMAGES):
|
||||
@ echo "No output/images directory in buildroot."
|
||||
@ echo "Run make --jobs in buildroot directory before generating device tree binaries."; exit 1
|
||||
# Create disassembly files
|
||||
disassemble: check_environment $(OBJDUMPS) $(DISASSEMBLY_DIR)/rootfs
|
||||
|
||||
$(RISCV):
|
||||
@ echo "ERROR: No $(RISCV) directory. Make sure you have installed the Wally Toolchain."
|
||||
@ echo "and sourced setup.sh"
|
||||
|
||||
# Disassembly rules ---------------------------------------------------
|
||||
disassemble: check_environment
|
||||
rm -rf $(BUILDROOT)/output/images/disassembly
|
||||
find $(BUILDROOT)/output/build/linux-* -maxdepth 1 -name "vmlinux" | xargs cp -t $(BUILDROOT)/output/images/
|
||||
mkdir -p $(DIS)
|
||||
$(MAKE) $(OBJDUMPS)
|
||||
# extract rootfs
|
||||
mkdir -p $(BUILDROOT)/output/images/disassembly/rootfs
|
||||
# Extract rootfs
|
||||
$(DISASSEMBLY_DIR)/rootfs: $(IMAGE_DIR)/rootfs.cpio
|
||||
@echo "Ignore error about dev/console when extracting rootfs from rootfs.cpio"
|
||||
-cpio -i -D $(BUILDROOT)/output/images/disassembly/rootfs < $(BUILDROOT)/output/images/rootfs.cpio
|
||||
@echo "Disassembly successfully completed."
|
||||
-cpio -id -D $(DISASSEMBLY_DIR)/rootfs -F $(IMAGE_DIR)/rootfs.cpio
|
||||
|
||||
$(DIS)/%.objdump: $(IMAGES)/%.elf
|
||||
riscv64-unknown-elf-objdump -DS $< >> $@
|
||||
$(WALLY)/bin/extractFunctionRadix.sh $@
|
||||
|
||||
$(DIS)/%.objdump: $(IMAGES)/%
|
||||
# Disassemble binaries
|
||||
$(DISASSEMBLY_DIR)/%.objdump: $(IMAGE_DIR)/% | $(DISASSEMBLY_DIR)
|
||||
riscv64-unknown-elf-objdump -S $< >> $@
|
||||
$(WALLY)/bin/extractFunctionRadix.sh $@
|
||||
|
||||
$(IMAGES)/vmlinux:
|
||||
linuxDir=$$(find $(BUILDROOT)/output/build -maxdepth 2 -type d -regex ".*/linux-[0-9]+\.[0-9]+\.[0-9]+$$") ;\
|
||||
cp $$linuxDir/vmlinux $@ ;\
|
||||
# Disassemble binaries ending in .elf
|
||||
$(DISASSEMBLY_DIR)/%.objdump: $(IMAGE_DIR)/%.elf | $(DISASSEMBLY_DIR)
|
||||
riscv64-unknown-elf-objdump -SD $< >> $@
|
||||
$(WALLY)/bin/extractFunctionRadix.sh $@
|
||||
|
||||
$(IMAGES)/busybox:
|
||||
busyboxDir=$$(find $(BUILDROOT)/output/build -maxdepth 2 -type d -regex ".*/busybox-[0-9]+\.[0-9]+\.[0-9]+$$") ;\
|
||||
cp $$busyboxDir/busybox $@ ;\
|
||||
|
||||
# Generating new Buildroot directories --------------------------------
|
||||
download: $(BUILDROOT)
|
||||
# Load wally buildroot configuration
|
||||
config: $(BUILDROOT) $(BR2_EXTERNAL_TREE)/configs/wally_defconfig
|
||||
$(MAKE) -C $(BUILDROOT) wally_defconfig BR2_EXTERNAL=$(BR2_EXTERNAL_TREE)
|
||||
@echo "Buildroot successfully download."
|
||||
|
||||
# Clone buildroot and checkout the correct version
|
||||
$(BUILDROOT):
|
||||
git clone https://github.com/buildroot/buildroot.git $@
|
||||
cd $@; git checkout 2024.11.x
|
||||
|
||||
# ---------------------------------------------------------------------
|
||||
# Create directories
|
||||
$(LINUX_TESTVECTORS): check_write_permissions
|
||||
$(SUDO) mkdir -p $@
|
||||
|
||||
$(DISASSEMBLY_DIR):
|
||||
mkdir -p $@
|
||||
|
||||
# Remove device tree binaries
|
||||
cleanDTB:
|
||||
rm -f $(IMAGES)/*.dtb
|
||||
rm -f $(IMAGE_DIR)/*.dtb
|
||||
|
||||
# Remove buildroot directory
|
||||
clean:
|
||||
rm -rf $(BUILDROOT)
|
||||
|
||||
# Check if the RISCV environment variable is set
|
||||
$(RISCV):
|
||||
@ echo "ERROR: No $(RISCV) directory. Make sure you have installed the Wally Toolchain."
|
||||
@ echo "and sourced setup.sh"
|
||||
|
||||
# Check if the WALLY environment variable is set
|
||||
$(WALLY):
|
||||
@ echo "ERROR: $$WALLY is not set. Make sure you have sourced setup.sh"
|
||||
|
||||
@ -35,7 +35,7 @@ The device tree files for the various FPGAs Wally supports, as well as QEMU's de
|
||||
They are built automatically using the main `make` command. To build the device tree binaries (.dtb) from the device tree sources (.dts) separately, we can build all of them at once using:
|
||||
|
||||
```bash
|
||||
$ make generate # optionally override BUILDROOT
|
||||
$ make devicetrees # optionally override BUILDROOT
|
||||
```
|
||||
|
||||
The .dts files will end up in the `<BUILDROOT>/output/images` folder of your chosen buildroot directory.
|
||||
|
||||
5
linux/br2-external-tree/board/wally/post_image.sh
Executable file
5
linux/br2-external-tree/board/wally/post_image.sh
Executable file
@ -0,0 +1,5 @@
|
||||
#!/bin/sh
|
||||
|
||||
# Copy linux and busybox binaries (with symbol info) to images directory
|
||||
cp "$BUILD_DIR"/linux-*/vmlinux "$BINARIES_DIR"/vmlinux
|
||||
cp "$BUILD_DIR"/busybox-*/busybox "$BINARIES_DIR"/busybox
|
||||
@ -10,6 +10,7 @@ BR2_GNU_MIRROR="http://ftpmirror.gnu.org"
|
||||
BR2_ENABLE_DEBUG=y
|
||||
BR2_DEBUG_3=y
|
||||
# BR2_STRIP_strip is not set
|
||||
BR2_PER_PACKAGE_DIRECTORIES=y
|
||||
# BR2_PIC_PIE is not set
|
||||
BR2_SSP_NONE=y
|
||||
BR2_RELRO_NONE=y
|
||||
@ -19,6 +20,7 @@ BR2_TARGET_GENERIC_ISSUE="Greetings! This RISC-V Linux image was built for Wally
|
||||
BR2_ROOTFS_DEVICE_TABLE_SUPPORTS_EXTENDED_ATTRIBUTES=y
|
||||
BR2_SYSTEM_DHCP="eth0"
|
||||
BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_WALLY_PATH)/board/wally/rootfs_overlay"
|
||||
BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_WALLY_PATH)/board/wally/post_image.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.12.8"
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
status = "okay";
|
||||
compatible = "riscv";
|
||||
riscv,isa-base = "rv64i";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svade", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm";
|
||||
riscv,cboz-block-size = <64>;
|
||||
riscv,cbom-block-size = <64>;
|
||||
mmu-type = "riscv,sv48";
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
status = "okay";
|
||||
compatible = "riscv";
|
||||
riscv,isa-base = "rv64i";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svade", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm";
|
||||
riscv,cboz-block-size = <64>;
|
||||
riscv,cbom-block-size = <64>;
|
||||
mmu-type = "riscv,sv48";
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
status = "okay";
|
||||
compatible = "riscv";
|
||||
riscv,isa-base = "rv64i";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svade", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm";
|
||||
riscv,cboz-block-size = <64>;
|
||||
riscv,cbom-block-size = <64>;
|
||||
mmu-type = "riscv,sv48";
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
status = "okay";
|
||||
compatible = "riscv";
|
||||
riscv,isa-base = "rv64i";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "sstc", "svade", "svadu", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zfa", "zfh", "zkn", "zkt", "zicbom", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihpm";
|
||||
riscv,cboz-block-size = <64>;
|
||||
riscv,cbom-block-size = <64>;
|
||||
mmu-type = "riscv,sv48";
|
||||
|
||||
@ -1,61 +0,0 @@
|
||||
#!/bin/bash
|
||||
set -e
|
||||
tcpPort=1235
|
||||
imageDir=$RISCV/buildroot/output/images
|
||||
tvDir=$RISCV/linux-testvectors
|
||||
rawRamFile="$tvDir/ramGDB.bin"
|
||||
ramFile="$tvDir/ram.bin"
|
||||
rawBootmemFile="$tvDir/bootmemGDB.bin"
|
||||
bootmemFile="$tvDir/bootmem.bin"
|
||||
rawUntrimmedBootmemFile="$tvDir/untrimmedBootmemFileGDB.bin"
|
||||
DEVICE_TREE=${imageDir}/wally-virt.dtb
|
||||
|
||||
if ! mkdir -p "$tvDir"; then
|
||||
echo "Error: unable to create linux testvector directory $tvDir!">&2
|
||||
echo "Please try running as sudo.">&2
|
||||
exit 1
|
||||
fi
|
||||
if ! test -w "$tvDir"; then
|
||||
echo "Using sudo to gain access to $tvDir"
|
||||
if ! sudo chmod -R a+rw "$tvDir"; then
|
||||
echo "Error: insuffcient write privileges for linux testvector directory $tvDir !">&2
|
||||
echo "Please chmod it. For example:">&2
|
||||
echo " sudo chmod -R a+rw $tvDir">&2
|
||||
exit 1
|
||||
fi
|
||||
fi
|
||||
|
||||
echo "Launching QEMU in replay mode!"
|
||||
(qemu-system-riscv64 \
|
||||
-M virt -m 256M -dtb "$DEVICE_TREE" \
|
||||
-nographic \
|
||||
-bios "$imageDir"/fw_jump.bin -kernel "$imageDir"/Image -append "root=/dev/vda ro" -initrd "$imageDir"/rootfs.cpio \
|
||||
-gdb tcp::$tcpPort -S) \
|
||||
& riscv64-unknown-elf-gdb --quiet \
|
||||
-ex "set pagination off" \
|
||||
-ex "set logging overwrite on" \
|
||||
-ex "set logging redirect on" \
|
||||
-ex "set confirm off" \
|
||||
-ex "target extended-remote :$tcpPort" \
|
||||
-ex "maintenance packet Qqemu.PhyMemMode:1" \
|
||||
-ex "printf \"Creating $rawBootmemFile\n\"" \
|
||||
-ex "dump binary memory $rawBootmemFile 0x1000 0x1fff" \
|
||||
-ex "printf \"Creating $rawRamFile\n\"" \
|
||||
-ex "dump binary memory $rawRamFile 0x80000000 0x8fffffff" \
|
||||
-ex "kill" \
|
||||
-ex "q"
|
||||
|
||||
echo "Changing Endianness"
|
||||
# Extend files to 8 byte multiple
|
||||
truncate -s %8 "$rawRamFile"
|
||||
truncate -s %8 "$rawBootmemFile"
|
||||
# Reverse bytes
|
||||
objcopy --reverse-bytes=8 -F binary "$rawRamFile" "$ramFile"
|
||||
objcopy --reverse-bytes=8 -F binary "$rawBootmemFile" "$bootmemFile"
|
||||
rm -f "$rawRamFile" "$rawBootmemFile" "$rawUntrimmedBootmemFile"
|
||||
|
||||
echo "genInitMem.sh completed!"
|
||||
echo "You may want to restrict write access to $tvDir now and give cad ownership of it."
|
||||
echo "Run the following:"
|
||||
echo " sudo chown -R cad:cad $tvDir"
|
||||
echo " sudo chmod -R go-w $tvDir"
|
||||
42
linux/qemuBoot.sh
Executable file
42
linux/qemuBoot.sh
Executable file
@ -0,0 +1,42 @@
|
||||
#!/bin/bash
|
||||
###########################################
|
||||
## Boot linux on QEMU configured to match Wally
|
||||
##
|
||||
## Written: Jordan Carlin, jcarlin@hmc.edu
|
||||
## Created: 20 January 2025
|
||||
## Modified:
|
||||
##
|
||||
## A component of the CORE-V-WALLY configurable RISC-V project.
|
||||
## https://github.com/openhwgroup/cvw
|
||||
##
|
||||
## Copyright (C) 2021-25 Harvey Mudd College & Oklahoma State University
|
||||
##
|
||||
## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
|
||||
##
|
||||
## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
|
||||
## except in compliance with the License, or, at your option, the Apache License version 2.0. You
|
||||
## may obtain a copy of the License at
|
||||
##
|
||||
## https:##solderpad.org/licenses/SHL-2.1/
|
||||
##
|
||||
## Unless required by applicable law or agreed to in writing, any work distributed under the
|
||||
## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
## either express or implied. See the License for the specific language governing permissions
|
||||
## and limitations under the License.
|
||||
################################################################################################
|
||||
|
||||
BUILDROOT="${BUILDROOT:-$RISCV/buildroot}"
|
||||
IMAGES="$BUILDROOT"/output/images
|
||||
|
||||
if [[ "$1" == "--gdb" && -n "$2" ]]; then
|
||||
GDB_FLAG="-gdb tcp::$2 -S"
|
||||
fi
|
||||
|
||||
qemu-system-riscv64 \
|
||||
-M virt -m 256M -nographic \
|
||||
-bios "$IMAGES"/fw_jump.bin \
|
||||
-kernel "$IMAGES"/Image \
|
||||
-initrd "$IMAGES"/rootfs.cpio \
|
||||
-dtb "$IMAGES"/wally-virt.dtb \
|
||||
-cpu rva22s64,zicond=true,zfa=true,zfh=true,zcb=true,zbc=true,zkn=true,sstc=true,svadu=true,svnapot=true \
|
||||
$GDB_FLAG
|
||||
@ -15,7 +15,7 @@ export IMPERASD_LICENSE_FILE=27020@zircon.eng.hmc.edu # Change thi
|
||||
export QUESTA_HOME=/cad/mentor/questa_sim-2023.4/questasim # Change this for your path to Questa, excluding bin
|
||||
export DC_HOME=/cad/synopsys/SYN # Change this for your path to Synopsys DC, excluding bin
|
||||
export VCS_HOME=/cad/synopsys/vcs/U-2023.03-SP2-4 # Change this for your path to Synopsys VCS, excluding bin
|
||||
export BREKER_HOME=/cad/breker/trek5-2.1.10b-GCC6_el7 # Change this for your path to Breker Trek
|
||||
export BREKER_HOME=/cad/breker/trek5-2.1.11-GCC6_el7 # Change this for your path to Breker Trek
|
||||
|
||||
# Tools
|
||||
# Questa and Synopsys
|
||||
|
||||
@ -2,6 +2,8 @@
|
||||
// wallyTracer.sv
|
||||
//
|
||||
// A component of the Wally configurable RISC-V project.
|
||||
// Implements a RISC-V Verification Interface (RVVI)
|
||||
// to support functional coverage and lockstep simulation.
|
||||
//
|
||||
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
|
||||
//
|
||||
@ -20,19 +22,16 @@
|
||||
////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
|
||||
`define NUM_REGS 32
|
||||
`define NUM_CSRS 4096
|
||||
|
||||
`define STD_LOG 0
|
||||
`define PRINT_PC_INSTR 0
|
||||
`define PRINT_MOST 0
|
||||
`define PRINT_ALL 0
|
||||
`define PRINT_CSRS 0
|
||||
|
||||
|
||||
module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
|
||||
|
||||
localparam NUMREGS = P.E_SUPPORTED ? 16 : 32;
|
||||
localparam NUM_REGS = P.E_SUPPORTED ? 16 : 32;
|
||||
localparam NUM_CSRS = 4096;
|
||||
|
||||
// wally specific signals
|
||||
logic reset;
|
||||
@ -50,17 +49,17 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
|
||||
logic TrapM, TrapW;
|
||||
logic HaltM, HaltW;
|
||||
logic [1:0] PrivilegeModeW;
|
||||
logic [P.XLEN-1:0] rf[NUMREGS];
|
||||
logic [NUMREGS-1:0] rf_wb;
|
||||
logic [P.XLEN-1:0] rf[NUM_REGS];
|
||||
logic [NUM_REGS-1:0] rf_wb;
|
||||
logic [4:0] rf_a3;
|
||||
logic rf_we3;
|
||||
logic [P.FLEN-1:0] frf[32];
|
||||
logic [`NUM_REGS-1:0] frf_wb;
|
||||
logic [31:0] frf_wb;
|
||||
logic [4:0] frf_a4;
|
||||
logic frf_we4;
|
||||
logic [P.XLEN-1:0] CSRArray [4095:0];
|
||||
logic [P.XLEN-1:0] CSRArrayOld [4095:0];
|
||||
logic [`NUM_CSRS-1:0] CSR_W;
|
||||
logic [NUM_CSRS-1:0] CSR_W;
|
||||
logic CSRWriteM, CSRWriteW;
|
||||
logic [11:0] CSRAdrM, CSRAdrW;
|
||||
logic wfiM;
|
||||
@ -314,8 +313,8 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
|
||||
|
||||
genvar index;
|
||||
assign rf[0] = 0;
|
||||
for(index = 1; index < NUMREGS; index += 1)
|
||||
assign rf[index] = testbench.dut.core.ieu.dp.regf.rf[index];
|
||||
for(index = 1; index < NUM_REGS; index += 1)
|
||||
assign rf[index] = testbench.dut.core.ieu.dp.regf.rf[index];
|
||||
|
||||
assign rf_a3 = testbench.dut.core.ieu.dp.regf.a3;
|
||||
assign rf_we3 = testbench.dut.core.ieu.dp.regf.we3;
|
||||
@ -329,12 +328,12 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
|
||||
if (P.F_SUPPORTED) begin
|
||||
assign frf_a4 = testbench.dut.core.fpu.fpu.fregfile.a4;
|
||||
assign frf_we4 = testbench.dut.core.fpu.fpu.fregfile.we4;
|
||||
for(index = 0; index < NUMREGS; index += 1)
|
||||
for(index = 0; index < 32; index += 1)
|
||||
assign frf[index] = testbench.dut.core.fpu.fpu.fregfile.rf[index];
|
||||
end else begin
|
||||
assign frf_a4 = '0;
|
||||
assign frf_we4 = 0;
|
||||
for(index = 0; index < NUMREGS; index += 1)
|
||||
for(index = 0; index < 32; index += 1)
|
||||
assign frf[index] = '0;
|
||||
end
|
||||
|
||||
@ -420,9 +419,11 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
|
||||
~FlushE ? PCD :
|
||||
~FlushD ? PCF : PCNextF;
|
||||
|
||||
for(index = 0; index < `NUM_REGS; index += 1) begin
|
||||
for(index = 0; index < NUM_REGS; index += 1) begin
|
||||
assign rvvi.x_wdata[0][0][index] = rf[index];
|
||||
assign rvvi.x_wb[0][0][index] = rf_wb[index];
|
||||
end
|
||||
for(index = 0; index < 32; index += 1) begin
|
||||
assign rvvi.f_wdata[0][0][index] = frf[index];
|
||||
assign rvvi.f_wb[0][0][index] = frf_wb[index];
|
||||
end
|
||||
@ -744,18 +745,18 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
|
||||
if(valid) begin
|
||||
if(`STD_LOG) begin
|
||||
$fwrite(file, "%016x, %08x, %s\t\t", rvvi.pc_rdata[0][0], rvvi.insn[0][0], instrWName);
|
||||
for(index2 = 0; index2 < `NUM_REGS; index2 += 1) begin
|
||||
for(index2 = 0; index2 < NUM_REGS; index2 += 1) begin
|
||||
if(rvvi.x_wb[0][0][index2]) begin
|
||||
$fwrite(file, "rf[%02d] = %016x ", index2, rvvi.x_wdata[0][0][index2]);
|
||||
end
|
||||
end
|
||||
end
|
||||
for(index2 = 0; index2 < `NUM_REGS; index2 += 1) begin
|
||||
for(index2 = 0; index2 < 32; index2 += 1) begin
|
||||
if(rvvi.f_wb[0][0][index2]) begin
|
||||
$fwrite(file, "frf[%02d] = %016x ", index2, rvvi.f_wdata[0][0][index2]);
|
||||
end
|
||||
end
|
||||
for(index2 = 0; index2 < `NUM_CSRS; index2 += 1) begin
|
||||
for(index2 = 0; index2 < NUM_CSRS; index2 += 1) begin
|
||||
if(rvvi.csr_wb[0][0][index2]) begin
|
||||
$fwrite(file, "csr[%03x] = %016x ", index2, rvvi.csr[0][0][index2]);
|
||||
end
|
||||
@ -769,15 +770,15 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
|
||||
else if(`PRINT_ALL) begin
|
||||
$display("order = %08d, PC = %08x, insn = %08x, trap = %1d, halt = %1d, intr = %1d, mode = %1x, ixl = %1x, pc_wdata = %08x",
|
||||
rvvi.order[0][0], rvvi.pc_rdata[0][0], rvvi.insn[0][0], rvvi.trap[0][0], rvvi.halt[0][0], rvvi.intr[0][0], rvvi.mode[0][0], rvvi.ixl[0][0], rvvi.pc_wdata[0][0]);
|
||||
for(index2 = 0; index2 < `NUM_REGS; index2 += 1) begin
|
||||
for(index2 = 0; index2 < NUM_REGS; index2 += 1) begin
|
||||
$display("x%02d = %08x", index2, rvvi.x_wdata[0][0][index2]);
|
||||
end
|
||||
for(index2 = 0; index2 < `NUM_REGS; index2 += 1) begin
|
||||
for(index2 = 0; index2 < 32; index2 += 1) begin
|
||||
$display("f%02d = %08x", index2, rvvi.f_wdata[0][0][index2]);
|
||||
end
|
||||
end
|
||||
if (`PRINT_CSRS) begin
|
||||
for(index2 = 0; index2 < `NUM_CSRS; index2 += 1) begin
|
||||
for(index2 = 0; index2 < NUM_CSRS; index2 += 1) begin
|
||||
if(CSR_W[index2]) begin
|
||||
$display("%t: CSR %03x = %x", $time(), index2, CSRArray[index2]);
|
||||
end
|
||||
|
||||
@ -1,25 +0,0 @@
|
||||
typedef RISCV_instruction #(ILEN, XLEN, FLEN, VLEN, NHART, RETIRE) test_ins_rv64i_t;
|
||||
|
||||
covergroup test_fencei_cg with function sample(test_ins_rv64i_t ins);
|
||||
option.per_instance = 1;
|
||||
option.comment = "Fence.I";
|
||||
|
||||
cp_asm_count : coverpoint ins.ins_str == "fence.i" iff (ins.trap == 0 ) {
|
||||
option.comment = "Number of times instruction is executed";
|
||||
bins count[] = {1};
|
||||
}
|
||||
endgroup
|
||||
|
||||
function void test_fencei_sample(int hart, int issue);
|
||||
test_ins_rv64i_t ins;
|
||||
|
||||
case (traceDataQ[hart][issue][0].inst_name)
|
||||
"fenci" : begin
|
||||
ins = new(hart, issue, traceDataQ);
|
||||
test_fencei_cg.sample(ins);
|
||||
end
|
||||
endcase
|
||||
|
||||
endfunction
|
||||
|
||||
|
||||
@ -1,4 +0,0 @@
|
||||
test_fencei_cg = new(); test_fencei_cg.set_inst_name("obj_fencei");
|
||||
|
||||
// test_fencei_cg = new();
|
||||
//test_fencei_cg.set_inst_name("obj_fencei");
|
||||
@ -1,108 +0,0 @@
|
||||
module test_pmp_coverage import cvw::*; #(parameter cvw_t P) (input clk);
|
||||
|
||||
// Ensure the covergroup is defined correctly
|
||||
covergroup cg_priv_mode @(posedge clk);
|
||||
coverpoint dut.core.ifu.PrivilegeModeW {
|
||||
bins user = {2'b00};
|
||||
bins superv = {2'b01};
|
||||
bins hyperv = {2'b10};
|
||||
bins mach = {2'b11};
|
||||
}
|
||||
endgroup
|
||||
|
||||
covergroup cg_PMPConfig @(posedge clk);
|
||||
coverpoint dut.core.ifu.PMPCFG_ARRAY_REGW[0][0] {
|
||||
bins ones = {1};
|
||||
bins zeros = {0};
|
||||
}
|
||||
endgroup
|
||||
|
||||
|
||||
function bit [1:0] getPMPConfigSlice(int index);
|
||||
return dut.core.ifu.immu.immu.PMPCFG_ARRAY_REGW[index][4:3];
|
||||
endfunction
|
||||
|
||||
//if (P.PMP_ENTRIES > 0) begin : pmp
|
||||
covergroup cg_pmpcfg_mode @(posedge clk);
|
||||
coverpoint dut.core.ifu.immu.immu.PMPCFG_ARRAY_REGW[0][4:3] {
|
||||
bins off = {2'b00};
|
||||
bins tor = {2'b01};
|
||||
bins na4 = {2'b10};
|
||||
bins napot = {2'b11};
|
||||
}
|
||||
|
||||
|
||||
coverpoint dut.core.ifu.immu.immu.PMPCFG_ARRAY_REGW[1][4:3] {
|
||||
bins off = {2'b00};
|
||||
bins tor = {2'b01};
|
||||
bins na4 = {2'b10};
|
||||
bins napot = {2'b11};
|
||||
}
|
||||
|
||||
coverpoint dut.core.ifu.immu.immu.PMPCFG_ARRAY_REGW[2][4:3] {
|
||||
bins off = {2'b00};
|
||||
bins tor = {2'b01};
|
||||
bins na4 = {2'b10};
|
||||
bins napot = {2'b11};
|
||||
}
|
||||
|
||||
coverpoint dut.core.ifu.immu.immu.PMPCFG_ARRAY_REGW[3][4:3] {
|
||||
bins off = {2'b00};
|
||||
bins tor = {2'b01};
|
||||
bins na4 = {2'b10};
|
||||
bins napot = {2'b11};
|
||||
}
|
||||
|
||||
coverpoint dut.core.ifu.immu.immu.PMPCFG_ARRAY_REGW[4][4:3] {
|
||||
bins off = {2'b00};
|
||||
bins tor = {2'b01};
|
||||
bins na4 = {2'b10};
|
||||
bins napot = {2'b11};
|
||||
}
|
||||
|
||||
coverpoint dut.core.ifu.immu.immu.PMPCFG_ARRAY_REGW[5][4:3] {
|
||||
bins off = {2'b00};
|
||||
bins tor = {2'b01};
|
||||
bins na4 = {2'b10};
|
||||
bins napot = {2'b11};
|
||||
}
|
||||
|
||||
coverpoint dut.core.ifu.immu.immu.PMPCFG_ARRAY_REGW[6][4:3] {
|
||||
bins off = {2'b00};
|
||||
bins tor = {2'b01};
|
||||
bins na4 = {2'b10};
|
||||
bins napot = {2'b11};
|
||||
}
|
||||
|
||||
coverpoint dut.core.ifu.immu.immu.PMPCFG_ARRAY_REGW[7][4:3] {
|
||||
bins off = {2'b00};
|
||||
bins tor = {2'b01};
|
||||
bins na4 = {2'b10};
|
||||
bins napot = {2'b11};
|
||||
}
|
||||
endgroup
|
||||
//end
|
||||
|
||||
|
||||
// Ensure that the instantiation and sampling of covergroups are within the correct procedural context
|
||||
initial begin
|
||||
cg_priv_mode privmodeCG = new(); // Instantiate the privilege mode covergroup
|
||||
cg_PMPConfig pmpconfigCG = new(); // Instantiate the PMP config covergroup
|
||||
cg_pmpcfg_mode pmpcfgmodeCG = new();
|
||||
|
||||
forever begin
|
||||
@(posedge clk) begin
|
||||
privmodeCG.sample(); // Sample the privilege mode covergroup
|
||||
pmpconfigCG.sample(); // Sample the PMP config covergroupi
|
||||
pmpcfgmodeCG.sample();
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
|
||||
endmodule
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@ -154,7 +154,11 @@ trek:
|
||||
doc: >-
|
||||
Verbatim code that will be put into the header section of the test.
|
||||
value: |-
|
||||
|
||||
// enable mtimer interrupts
|
||||
#define TREK_MTIME_BASE (0x0200bff8)
|
||||
#define TREK_MTIMECMP_BASE (0x02004000)
|
||||
#define TREK_MSWI_BASE (0x02000000)
|
||||
#define TREK_MTIMECMP_DELAY 0x1000
|
||||
declaration:
|
||||
doc: >-
|
||||
Verbatim code that will be put into the declaration section of the test.
|
||||
|
||||
@ -14,7 +14,7 @@ TREKSVIP := source $(TREKFILES)/breker-setup.sh && treksvip -p $(PLATFOR
|
||||
# Compilation paths and variables
|
||||
START_LIB_DIR := $(WALLY)/examples/C/common
|
||||
START_LIB := $(START_LIB_DIR)/crt.S $(START_LIB_DIR)/syscalls.c
|
||||
MARCH :=-march=rv64gc_zcb_zfa_zba_zbb_zbc_zbs_zfh_zicboz_zicbop_zicbom_zbkb_zbkx_zknd_zkne_zknh_svinval
|
||||
MARCH :=-march=rv64gc_zcb_zfa_zba_zbb_zbc_zbs_zfh_zicboz_zicbop_zicbom_zicond_zbkb_zbkx_zknd_zkne_zknh_svinval
|
||||
MABI :=-mabi=lp64d
|
||||
LINKER := $(START_LIB_DIR)/test.ld
|
||||
LINK_FLAGS := -nostartfiles
|
||||
|
||||
@ -21,8 +21,8 @@ class sail_cSim(pluginTemplate):
|
||||
raise SystemExit(1)
|
||||
self.num_jobs = str(config['jobs'] if 'jobs' in config else 1)
|
||||
self.pluginpath = os.path.abspath(config['pluginpath'])
|
||||
self.sail_exe = { '32' : os.path.join(config['PATH'] if 'PATH' in config else "","riscv_sim_RV32"),
|
||||
'64' : os.path.join(config['PATH'] if 'PATH' in config else "","riscv_sim_RV64")}
|
||||
self.sail_exe = { '32' : os.path.join(config['PATH'] if 'PATH' in config else "","riscv_sim_rv32d"),
|
||||
'64' : os.path.join(config['PATH'] if 'PATH' in config else "","riscv_sim_rv64d")}
|
||||
self.isa_spec = os.path.abspath(config['ispec']) if 'ispec' in config else ''
|
||||
self.platform_spec = os.path.abspath(config['pspec']) if 'ispec' in config else ''
|
||||
self.make = config['make'] if 'make' in config else 'make'
|
||||
|
||||
Loading…
Reference in New Issue
Block a user