Fixed bug where the wrong address is read into the icache memory.

This commit is contained in:
Ross Thompson 2021-12-21 15:16:00 -06:00
parent 0a7dc96052
commit 4ae15bf5e4

View File

@ -163,6 +163,7 @@ module icachefsm
NextState = STATE_HIT_SPILL;
end else if (~hit & ~spill) begin
CntReset = 1'b1;
SelAdr = 2'b01; /// *********(
NextState = STATE_MISS_FETCH_WDV;
end else if (~hit & spill) begin
CntReset = 1'b1;