From 4ad33d7acce1fcdc8659f00a3bd1a26b356e7685 Mon Sep 17 00:00:00 2001
From: Ross Thompson <ross1728@gmail.com>
Date: Mon, 17 Apr 2023 11:10:19 -0500
Subject: [PATCH] OMG. the ddr3 has it's own mmcm (pll) which had incorreclty
 specified the input clock period as 3000 ps rather than 6000 ps so the pll
 was running at twice the speed. I speed the whole weekend on this. :(

---
 fpga/generator/xlnx_ddr3-artya7-mig.prj | 2 +-
 fpga/generator/xlnx_mmcm.tcl            | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/fpga/generator/xlnx_ddr3-artya7-mig.prj b/fpga/generator/xlnx_ddr3-artya7-mig.prj
index 15eb1e5fb..2e86b4950 100644
--- a/fpga/generator/xlnx_ddr3-artya7-mig.prj
+++ b/fpga/generator/xlnx_ddr3-artya7-mig.prj
@@ -43,7 +43,7 @@
 
   <Controller number="0">
     <MemoryDevice>DDR3_SDRAM/Components/MT41J128M16XX-125</MemoryDevice>
-    <TimePeriod>3000</TimePeriod>
+    <TimePeriod>6000</TimePeriod>
     <VccAuxIO>1.8V</VccAuxIO>
     <PHYRatio>4:1</PHYRatio>
     <InputClkFreq>102.564</InputClkFreq>
diff --git a/fpga/generator/xlnx_mmcm.tcl b/fpga/generator/xlnx_mmcm.tcl
index 2f003e7a5..c5a05e1b6 100644
--- a/fpga/generator/xlnx_mmcm.tcl
+++ b/fpga/generator/xlnx_mmcm.tcl
@@ -13,7 +13,7 @@ set_property -dict [list CONFIG.PRIM_IN_FREQ {100.000} \
                         CONFIG.CLKOUT2_USED {true} \
                         CONFIG.CLKOUT3_USED {true} \
                         CONFIG.CLKOUT4_USED {false} \
-                        CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {166.66667} \
+                        CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {166.6667} \
                         CONFIG.CLKOUT2_REQUESTED_OUT_FREQ {200} \
                         CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {20} \
                         CONFIG.CLKIN1_JITTER_PS {10.0} \