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More progress towards verilator.

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This commit is contained in:
Rose Thompson 2023-12-18 13:26:43 -06:00
parent 5062a8c89c
commit 4a3cc8b9c8
1 changed files with 9 additions and 2 deletions
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testbench/common/DCacheFlushFSM.sv
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@ -125,14 +125,21 @@ module copyShadow import cvw::*; #(parameter cvw_t P,
output logic CacheValid, output logic CacheValid,
output logic CacheDirty); output logic CacheDirty);
logic [P.XLEN-1:0] TagExtend;
logic [P.XLEN-1:0] IndexExtend;
logic [P.XLEN-1:0] CacheWordExtend;
assign TagExtend = {{{P.XLEN-(P.PA_BITS-tagstart)}{1'b0}}, tag};
assign IndexExtend = {{{P.XLEN-32}{1'b0}}, index};
assign CacheWordExtend = {{{P.XLEN-32}{1'b0}}, cacheWord};
always_ff @(posedge clk) begin always_ff @(posedge clk) begin
if(start) begin if(start) begin
CacheTag = tag; CacheTag = TagExtend;
CacheValid = valid; CacheValid = valid;
CacheDirty = dirty; CacheDirty = dirty;
CacheData = data; CacheData = data;
CacheAdr = (tag << tagstart) + (index << loglinebytelen) + (cacheWord << $clog2(sramlen/8)); CacheAdr = (TagExtend << tagstart) + (IndexExtend << loglinebytelen) + (CacheWordExtend << $clog2(sramlen/8));
end end
end end