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https://github.com/openhwgroup/cvw
synced 2025-01-24 13:34:28 +00:00
Almost working functional coverage in wally.do
riscvISACOV is now loading, but for some reason I still cannot get it to record anything. Instead it is just logging the instructions.
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parent
92ee56c1a1
commit
4a1e856b18
4
bin/wsim
4
bin/wsim
@ -28,6 +28,7 @@ parser.add_argument("--args", "-a", help="Optional arguments passed to simulator
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parser.add_argument("--vcd", "-v", help="Generate testbench.vcd", action="store_true")
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parser.add_argument("--vcd", "-v", help="Generate testbench.vcd", action="store_true")
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parser.add_argument("--lockstep", "-l", help="Run ImperasDV lock, step, and compare.", action="store_true")
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parser.add_argument("--lockstep", "-l", help="Run ImperasDV lock, step, and compare.", action="store_true")
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parser.add_argument("--locksteplog", "-b", help="Retired instruction number to be begin logging.", default=0)
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parser.add_argument("--locksteplog", "-b", help="Retired instruction number to be begin logging.", default=0)
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parser.add_argument("--covlog", "-d", help="Log coverage after n instructions.", default=0)
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args = parser.parse_args()
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args = parser.parse_args()
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print("Config=" + args.config + " tests=" + args.testsuite + " sim=" + args.sim + " gui=" + str(args.gui) + " args='" + args.args + "'")
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print("Config=" + args.config + " tests=" + args.testsuite + " sim=" + args.sim + " gui=" + str(args.gui) + " args='" + args.args + "'")
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ElfFile=""
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ElfFile=""
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@ -65,7 +66,8 @@ cd = "cd $WALLY/sim/" +args.sim
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if (args.sim == "questa"):
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if (args.sim == "questa"):
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if (args.lockstep):
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if (args.lockstep):
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Instret = str(args.locksteplog)
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Instret = str(args.locksteplog)
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prefix ="IMPERAS_TOOLS=" + WALLY + "/sim/imperas.ic OTHERFLAGS=\"+IDV_TRACE2LOG=" + Instret + " +IDV_TRACE2COV=" + Instret + "\" ";
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CovEnableStr = "1\"" if int(args.covlog) > 0 else "0\"";
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prefix ="IMPERAS_TOOLS=" + WALLY + "/sim/imperas.ic OTHERFLAGS=\"+IDV_TRACE2LOG=" + Instret + " +IDV_TRACE2COV=" + str(args.covlog) + " +TRACE2COV_ENABLE=" + CovEnableStr;
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suffix = "--lockstep"
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suffix = "--lockstep"
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else:
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else:
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prefix = ""
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prefix = ""
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@ -174,7 +174,7 @@ if {$DEBUG > 0} {
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# "Extra checking for conflicts with always_comb done at vopt time"
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# "Extra checking for conflicts with always_comb done at vopt time"
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# because vsim will run vopt
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# because vsim will run vopt
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vlog -lint -work ${WKDIR} +incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CFG} +incdir+${CONFIG}/shared ${lockstepvoptstring} ${FCdefineIDV_INCLUDE_TRACE2COV} ${ImperasPubInc} ${ImperasPrivInc} ${rvviFiles} ${idvFiles} ${FCdefineINCLUDE_TRACE2COV} ${FCdefineCOVER_BASE_RV64I} ${FCdefineCOVER_LEVEL_DV_PR_EXT} ${FCdefineCOVER_RV64I} ${FCdefineCOVER_RV64M} ${FCdefineCOVER_RV64A} ${FCdefineCOVER_RV64F} ${FCdefineCOVER_RV64D} ${FCdefineCOVER_RV64ZICSR} ${FCdefineCOVER_RV64C} ${riscvISACOVsrc} ${SRC}/cvw.sv ${TB}/${TESTBENCH}.sv ${TB}/common/*.sv ${SRC}/*/*.sv ${SRC}/*/*/*.sv -suppress 2583 -suppress 7063,2596,13286
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vlog -lint -work ${WKDIR} +incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CFG} +incdir+${CONFIG}/shared ${lockstepvoptstring} ${FCdefineIDV_INCLUDE_TRACE2COV} ${FCdefineINCLUDE_TRACE2COV} ${ImperasPubInc} ${ImperasPrivInc} ${rvviFiles} ${idvFiles} ${FCdefineCOVER_BASE_RV64I} ${FCdefineCOVER_LEVEL_DV_PR_EXT} ${FCdefineCOVER_RV64I} ${FCdefineCOVER_RV64M} ${FCdefineCOVER_RV64A} ${FCdefineCOVER_RV64F} ${FCdefineCOVER_RV64D} ${FCdefineCOVER_RV64ZICSR} ${FCdefineCOVER_RV64C} ${riscvISACOVsrc} ${SRC}/cvw.sv ${TB}/${TESTBENCH}.sv ${TB}/common/*.sv ${SRC}/*/*.sv ${SRC}/*/*/*.sv -suppress 2583 -suppress 7063,2596,13286
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# start and run simulation
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# start and run simulation
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# remove +acc flag for faster sim during regressions if there is no need to access internal signals
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# remove +acc flag for faster sim during regressions if there is no need to access internal signals
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