From 49a85c7f50373337f7de2b97b3aec1f4ed84a78f Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Wed, 19 Oct 2022 10:42:19 -0500 Subject: [PATCH] Sort of solved the bit width warning for dtim, irom ranges. --- pipelined/regression/wally-pipelined.do | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/pipelined/regression/wally-pipelined.do b/pipelined/regression/wally-pipelined.do index 9e8477303..5f019c350 100644 --- a/pipelined/regression/wally-pipelined.do +++ b/pipelined/regression/wally-pipelined.do @@ -79,7 +79,8 @@ if {$2 eq "buildroot" || $2 eq "buildroot-checkpoint"} { if {$2 eq "ahb"} { vlog +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv -suppress 2583 -suppress 7063 +define+RAM_LATENCY=$3 +define+BURST_EN=$4 } else { - vlog +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv -suppress 2583 -suppress 7063 +define+DTIM_RANGE=8388607 +define+IROM_RANGE=8388607 + # *** modelsim won't take `PA_BITS, but will take other defines for the lengths of DTIM_RANGE and IROM_LEN. For now just live with the warnings. + vlog +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv -suppress 2583 -suppress 7063 +define+DTIM_RANGE=56'd8388607 +define+IROM_RANGE=56'd8388607 } vopt +acc work.testbench -G TEST=$2 -G DEBUG=1 -o workopt