From 47f8e847f09e7a08d9684962c6b13f55cab61304 Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Fri, 24 Mar 2023 10:51:04 -0500 Subject: [PATCH] Renamed ebu signal. --- src/ebu/ebufsmarb.sv | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/ebu/ebufsmarb.sv b/src/ebu/ebufsmarb.sv index 11d3eb2b6..1990e8f5d 100644 --- a/src/ebu/ebufsmarb.sv +++ b/src/ebu/ebufsmarb.sv @@ -57,7 +57,7 @@ module ebufsmarb ( logic FinalBeat, FinalBeatD; // Indicates the last beat of a burst logic BeatCntEn; logic [3:0] BeatCount; // Position within a burst transfer - logic CntReset; + logic BeatCntReset; logic [3:0] Threshold; // Number of beats derived from HBURST //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -98,13 +98,13 @@ module ebufsmarb ( // Burst mode logic //////////////////////////////////////////////////////////////////////////////////////////////////// - assign CntReset = NextState == IDLE; + assign BeatCntReset = NextState == IDLE; assign FinalBeat = (BeatCount == Threshold); // Detect when we are waiting on the final access. assign BeatCntEn = (NextState == ARBITRATE) & HREADY; - counter #(4) BeatCounter(HCLK, ~HRESETn | CntReset | FinalBeat, BeatCntEn, BeatCount); + counter #(4) BeatCounter(HCLK, ~HRESETn | BeatCntReset | FinalBeat, BeatCntEn, BeatCount); // Used to store data from data phase of AHB. - flopenr #(1) FinalBeatReg(HCLK, ~HRESETn | CntReset, BeatCntEn, FinalBeat, FinalBeatD); + flopenr #(1) FinalBeatReg(HCLK, ~HRESETn | BeatCntReset, BeatCntEn, FinalBeat, FinalBeatD); // unlike the bus fsm in lsu/ifu, we need to derive the number of beats from HBURST. // HBURST[2:1] Beats