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Ignore benchmark results
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.gitignore
vendored
5
.gitignore
vendored
@ -10,7 +10,7 @@ __pycache__/
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addins/riscv-arch-test/Makefile.include
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addins/riscv-tests/target
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addins/TestFloat-3e/build/Linux-x86_64-GCC/*
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benchmarks/embench/wally*.json
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#vsim work files to ignore
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transcript
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@ -175,3 +175,6 @@ tests/fp/combined_IF_vectors/IF_vectors/*.tv
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sim/bp-results/*.log
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sim/branch*.log
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/tests/custom/fpga-test-sdc/bin/fpga-test-sdc
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benchmarks/embench/wally*.json
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benchmarks/embench/run*
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sim/cfi.log
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