From 4198145ce281b94c695cec15a2b6676eb13ca7ef Mon Sep 17 00:00:00 2001 From: Daniel Torres Date: Fri, 22 Jul 2022 14:58:55 -0700 Subject: [PATCH] added changes to stvec of reference signatures, modified some tests to copy over reference file instead of running on sail --- pipelined/testbench/tests.vh | 308 +++++++----------- .../rv32i_m/privilege/src/WALLY-plic-01.S | 3 + .../rv32i_m/privilege/src/WALLY-plic-s-01.S | 3 + .../rv32i_m/privilege/src/WALLY-pmp.S | 2 +- .../rv32i_m/privilege/src/WALLY-uart-01.S | 3 + .../references/WALLY-trap-01.reference_output | 12 +- .../WALLY-trap-s-01.reference_output | 12 +- .../WALLY-trap-u-01.reference_output | 12 +- .../rv64i_m/privilege/src/WALLY-pmp.S | 2 +- .../privilege/src/WALLY-status-sie-01.S | 2 +- .../privilege/src/WALLY-status-tw-01.S | 2 +- 11 files changed, 141 insertions(+), 220 deletions(-) diff --git a/pipelined/testbench/tests.vh b/pipelined/testbench/tests.vh index a2145835d..806709f08 100644 --- a/pipelined/testbench/tests.vh +++ b/pipelined/testbench/tests.vh @@ -34,7 +34,7 @@ string tvpaths[] = '{ "../../addins/imperas-riscv-tests/work/", "../../tests/riscof/work/riscv-arch-test/", - "../../tests/wally-riscv-arch-test/work/", //"../../tests/riscof/work/wally-riscv-arch-test/", // + "../../tests/riscof/work/wally-riscv-arch-test/", "../../tests/imperas-riscv-tests/work/", "../../benchmarks/coremark/work/", "../../addins/embench-iot/" @@ -93,24 +93,8 @@ string tvpaths[] = '{ "bd_sizeopt_speed/src/wikisort/wikisort" }; - string wally64a[] = '{ - `WALLYTEST, - "rv64i_m/privilege/WALLY-amo", - "rv64i_m/privilege/WALLY-lrsc", - "rv64i_m/privilege/WALLY-status-fp-enabled-01" - }; - - string wally32a[] = '{ - `WALLYTEST, - "rv32i_m/privilege/WALLY-amo", - "rv32i_m/privilege/WALLY-lrsc", - "rv32i_m/privilege/WALLY-status-fp-enabled-01" - - }; - // *** restore CSR tests from Imperas old - - string extra64i[] = '{ + string extra64i[] = '{ `MYIMPERASTEST, "rv64i_m/I/WALLY-ADD", "rv64i_m/I/WALLY-SUB", @@ -920,6 +904,20 @@ string imperas32f[] = '{ "rv32p/WALLY-CSR-PERMISSIONS-S" }; + string wally64a[] = '{ + `WALLYTEST, + "rv64i_m/privilege/src/WALLY-amo.S", + "rv64i_m/privilege/src/WALLY-lrsc.S", + "rv64i_m/privilege/src/WALLY-status-fp-enabled-01.S" + }; + + string wally32a[] = '{ + `WALLYTEST, + "rv32i_m/privilege/src/WALLY-amo.S", + "rv32i_m/privilege/src/WALLY-lrsc.S", + "rv32i_m/privilege/src/WALLY-status-fp-enabled-01.S" + }; + string arch64priv[] = '{ `RISCVARCHTEST, "rv64i_m/privilege/src/ebreak.S", @@ -1492,212 +1490,126 @@ string imperas32f[] = '{ string wally64i[] = '{ `WALLYTEST, - "rv64i_m/I/WALLY-ADD", - "rv64i_m/I/WALLY-SLT", - "rv64i_m/I/WALLY-SLTU", - "rv64i_m/I/WALLY-SUB", - "rv64i_m/I/WALLY-XOR" + "rv64i_m/I/src/WALLY-ADD.S", + "rv64i_m/I/src/WALLY-SLT.S", + "rv64i_m/I/src/WALLY-SLTU.S", + "rv64i_m/I/src/WALLY-SUB.S", + "rv64i_m/I/src/WALLY-XOR.S" }; + string wally64priv[] = '{ `WALLYTEST, - "rv64i_m/privilege/WALLY-status-tw-01", - "rv64i_m/privilege/WALLY-csr-permission-s-01", - "rv64i_m/privilege/WALLY-csr-permission-u-01", - "rv64i_m/privilege/WALLY-minfo-01", - "rv64i_m/privilege/WALLY-misa-01", - "rv64i_m/privilege/WALLY-mmu-sv39", - "rv64i_m/privilege/WALLY-mmu-sv48", - "rv64i_m/privilege/WALLY-pma", - "rv64i_m/privilege/WALLY-pmp", - "rv64i_m/privilege/WALLY-trap-01", - "rv64i_m/privilege/WALLY-trap-s-01", - "rv64i_m/privilege/WALLY-trap-u-01", - "rv64i_m/privilege/WALLY-mie-01", - "rv64i_m/privilege/WALLY-sie-01", - "rv64i_m/privilege/WALLY-mtvec-01", - "rv64i_m/privilege/WALLY-stvec-01", - "rv64i_m/privilege/WALLY-status-mie-01", - "rv64i_m/privilege/WALLY-status-sie-01", - "rv64i_m/privilege/WALLY-trap-sret-01", - "rv64i_m/privilege/WALLY-status-tw-01", - "rv64i_m/privilege/WALLY-wfi-01" + "rv64i_m/privilege/src/WALLY-csr-permission-s-01.S", + "rv64i_m/privilege/src/WALLY-csr-permission-u-01.S", + "rv64i_m/privilege/src/WALLY-mie-01.S", + "rv64i_m/privilege/src/WALLY-minfo-01.S", + "rv64i_m/privilege/src/WALLY-misa-01.S", + "rv64i_m/privilege/src/WALLY-mmu-sv39.S", + "rv64i_m/privilege/src/WALLY-mmu-sv48.S", + "rv64i_m/privilege/src/WALLY-mtvec-01.S", + "rv64i_m/privilege/src/WALLY-pma.S", + "rv64i_m/privilege/src/WALLY-pmp.S", + "rv64i_m/privilege/src/WALLY-sie-01.S", + "rv64i_m/privilege/src/WALLY-status-mie-01.S", + "rv64i_m/privilege/src/WALLY-status-sie-01.S", + "rv64i_m/privilege/src/WALLY-status-tw-01.S", + "rv64i_m/privilege/src/WALLY-stvec-01.S", + "rv64i_m/privilege/src/WALLY-trap-01.S", + "rv64i_m/privilege/src/WALLY-trap-s-01.S", + "rv64i_m/privilege/src/WALLY-trap-sret-01.S", + "rv64i_m/privilege/src/WALLY-trap-u-01.S", + "rv64i_m/privilege/src/WALLY-wfi-01.S" }; string wally64periph[] = '{ `WALLYTEST, - "rv64i_m/privilege/WALLY-periph" + "rv64i_m/privilege/src/WALLY-periph.S" }; string wally32e[] = '{ `WALLYTEST, - "rv32i_m/I/E-add-01", - "rv32i_m/I/E-addi-01", - "rv32i_m/I/E-and-01", - "rv32i_m/I/E-andi-01", - "rv32i_m/I/E-auipc-01", - "rv32i_m/I/E-bge-01", - "rv32i_m/I/E-bgeu-01", - "rv32i_m/I/E-blt-01", - "rv32i_m/I/E-bltu-01", - "rv32i_m/I/E-bne-01", - "rv32i_m/I/E-jal-01", - "rv32i_m/I/E-jalr-01", - "rv32i_m/I/E-lb-align-01", - "rv32i_m/I/E-lbu-align-01", - "rv32i_m/I/E-lh-align-01", - "rv32i_m/I/E-lhu-align-01", - "rv32i_m/I/E-lui-01", - "rv32i_m/I/E-lw-align-01", - "rv32i_m/I/E-or-01", - "rv32i_m/I/E-ori-01", - "rv32i_m/I/E-sb-align-01", - "rv32i_m/I/E-sh-align-01", - "rv32i_m/I/E-sll-01", - "rv32i_m/I/E-slli-01", - "rv32i_m/I/E-slt-01", - "rv32i_m/I/E-slti-01", - "rv32i_m/I/E-sltiu-01", - "rv32i_m/I/E-sltu-01", - "rv32i_m/I/E-sra-01", - "rv32i_m/I/E-srai-01", - "rv32i_m/I/E-srl-01", - "rv32i_m/I/E-srli-01", - "rv32i_m/I/E-sub-01", - "rv32i_m/I/E-sw-align-01", - "rv32i_m/I/E-xor-01", - "rv32i_m/I/E-xori-01" + "rv32i_m/I/src/E-add-01.S", + "rv32i_m/I/src/E-addi-01.S", + "rv32i_m/I/src/E-and-01.S", + "rv32i_m/I/src/E-andi-01.S", + "rv32i_m/I/src/E-auipc-01.S", + "rv32i_m/I/src/E-bge-01.S", + "rv32i_m/I/src/E-bgeu-01.S", + "rv32i_m/I/src/E-blt-01.S", + "rv32i_m/I/src/E-bltu-01.S", + "rv32i_m/I/src/E-bne-01.S", + "rv32i_m/I/src/E-jal-01.S", + "rv32i_m/I/src/E-jalr-01.S", + "rv32i_m/I/src/E-lb-align-01.S", + "rv32i_m/I/src/E-lbu-align-01.S", + "rv32i_m/I/src/E-lh-align-01.S", + "rv32i_m/I/src/E-lhu-align-01.S", + "rv32i_m/I/src/E-lui-01.S", + "rv32i_m/I/src/E-lw-align-01.S", + "rv32i_m/I/src/E-or-01.S", + "rv32i_m/I/src/E-ori-01.S", + "rv32i_m/I/src/E-sb-align-01.S", + "rv32i_m/I/src/E-sh-align-01.S", + "rv32i_m/I/src/E-sll-01.S", + "rv32i_m/I/src/E-slli-01.S", + "rv32i_m/I/src/E-slt-01.S", + "rv32i_m/I/src/E-slti-01.S", + "rv32i_m/I/src/E-sltiu-01.S", + "rv32i_m/I/src/E-sltu-01.S", + "rv32i_m/I/src/E-sra-01.S", + "rv32i_m/I/src/E-srai-01.S", + "rv32i_m/I/src/E-srl-01.S", + "rv32i_m/I/src/E-srli-01.S", + "rv32i_m/I/src/E-sub-01.S", + "rv32i_m/I/src/E-sw-align-01.S", + "rv32i_m/I/src/E-xor-01.S", + "rv32i_m/I/src/E-xori-01.S" }; -string wally32i[] = '{ + string wally32i[] = '{ `WALLYTEST, - "rv32i_m/I/WALLY-ADD", - "rv32i_m/I/WALLY-SLT", - "rv32i_m/I/WALLY-SLTU", - "rv32i_m/I/WALLY-SUB", - "rv32i_m/I/WALLY-XOR" + "rv32i_m/I/src/WALLY-ADD.S", + "rv32i_m/I/src/WALLY-SLT.S", + "rv32i_m/I/src/WALLY-SLTU.S", + "rv32i_m/I/src/WALLY-SUB.S", + "rv32i_m/I/src/WALLY-XOR.S" }; + string wally32priv[] = '{ `WALLYTEST, - "rv32i_m/privilege/WALLY-csr-permission-s-01", - "rv32i_m/privilege/WALLY-csr-permission-u-01", - "rv32i_m/privilege/WALLY-minfo-01", - "rv32i_m/privilege/WALLY-misa-01", - "rv32i_m/privilege/WALLY-mmu-sv32", - "rv32i_m/privilege/WALLY-pma", - "rv32i_m/privilege/WALLY-pmp", - "rv32i_m/privilege/WALLY-trap-01", - "rv32i_m/privilege/WALLY-trap-s-01", - "rv32i_m/privilege/WALLY-trap-u-01", - "rv32i_m/privilege/WALLY-mie-01", - "rv32i_m/privilege/WALLY-sie-01", - "rv32i_m/privilege/WALLY-mtvec-01", - "rv32i_m/privilege/WALLY-stvec-01", - "rv32i_m/privilege/WALLY-status-mie-01", - "rv32i_m/privilege/WALLY-status-sie-01", - "rv32i_m/privilege/WALLY-trap-sret-01", - "rv32i_m/privilege/WALLY-status-tw-01", - "rv32i_m/privilege/WALLY-wfi-01" + "rv32i_m/privilege/src/WALLY-csr-permission-s-01.S", + "rv32i_m/privilege/src/WALLY-csr-permission-u-01.S", + "rv32i_m/privilege/src/WALLY-mie-01.S", + "rv32i_m/privilege/src/WALLY-minfo-01.S", + "rv32i_m/privilege/src/WALLY-misa-01.S", + "rv32i_m/privilege/src/WALLY-mmu-sv32.S", + "rv32i_m/privilege/src/WALLY-mtvec-01.S", + "rv32i_m/privilege/src/WALLY-pma.S", + "rv32i_m/privilege/src/WALLY-pmp.S", + "rv32i_m/privilege/src/WALLY-sie-01.S", + "rv32i_m/privilege/src/WALLY-status-mie-01.S", + "rv32i_m/privilege/src/WALLY-status-sie-01.S", + "rv32i_m/privilege/src/WALLY-status-tw-01.S", + "rv32i_m/privilege/src/WALLY-stvec-01.S", + "rv32i_m/privilege/src/WALLY-trap-01.S", + "rv32i_m/privilege/src/WALLY-trap-s-01.S", + "rv32i_m/privilege/src/WALLY-trap-sret-01.S", + "rv32i_m/privilege/src/WALLY-trap-u-01.S", + "rv32i_m/privilege/src/WALLY-wfi-01.S" }; string wally32periph[] = '{ `WALLYTEST, - // "rv32i_m/privilege/WALLY-gpio-01", - // "rv32i_m/privilege/WALLY-clint-01" - "rv32i_m/privilege/WALLY-plic-01" - // "rv32i_m/privilege/WALLY-uart-01" + "rv32i_m/privilege/src/WALLY-gpio-01.S", + "rv32i_m/privilege/src/WALLY-clint-01.S", + "rv32i_m/privilege/src/WALLY-uart-01.S", + "rv32i_m/privilege/src/WALLY-plic-01.S" }; -// riscof test paths, to replace existing paths once riscof flow is working -// string wally64a[] = '{ -// `WALLYTEST, -// "rv64i_m/privilege/src/WALLY-amo.S", -// "rv64i_m/privilege/src/WALLY-lrsc.S", -// "rv64i_m/privilege/src/WALLY-status-fp-enabled-01.S" -// }; - -// string wally32a[] = '{ -// `WALLYTEST, -// "rv32i_m/privilege/src/WALLY-amo.S", -// "rv32i_m/privilege/src/WALLY-lrsc.S", -// "rv32i_m/privilege/src/WALLY-status-fp-enabled-01.S" - -// }; - -// string wally64i[] = '{ -// `WALLYTEST, -// "rv64i_m/I/src/WALLY-ADD.S", -// "rv64i_m/I/src/WALLY-SLT.S", -// "rv64i_m/I/src/WALLY-SLTU.S", -// "rv64i_m/I/src/WALLY-SUB.S", -// "rv64i_m/I/src/WALLY-XOR.S" -// }; - -// string wally64priv[] = '{ -// `WALLYTEST, -// "rv64i_m/privilege/src/WALLY-csr-permission-s-01.S", -// "rv64i_m/privilege/src/WALLY-csr-permission-u-01.S", -// "rv64i_m/privilege/src/WALLY-mie-01.S", -// "rv64i_m/privilege/src/WALLY-minfo-01.S", -// "rv64i_m/privilege/src/WALLY-misa-01.S", -// "rv64i_m/privilege/src/WALLY-mmu-sv39.S", -// "rv64i_m/privilege/src/WALLY-mmu-sv48.S", -// "rv64i_m/privilege/src/WALLY-mtvec-01.S", -// "rv64i_m/privilege/src/WALLY-pma.S", -// "rv64i_m/privilege/src/WALLY-pmp.S", -// "rv64i_m/privilege/src/WALLY-sie-01.S", -// "rv64i_m/privilege/src/WALLY-status-mie-01.S", -// "rv64i_m/privilege/src/WALLY-status-sie-01.S", -// "rv64i_m/privilege/src/WALLY-status-tw-01.S", -// "rv64i_m/privilege/src/WALLY-stvec-01.S", -// "rv64i_m/privilege/src/WALLY-trap-01.S", -// "rv64i_m/privilege/src/WALLY-trap-s-01.S", -// "rv64i_m/privilege/src/WALLY-trap-sret-01.S", -// "rv64i_m/privilege/src/WALLY-trap-u-01.S", -// "rv64i_m/privilege/src/WALLY-wfi-01.S" -// }; - -// string wally64periph[] = '{ -// `WALLYTEST, -// "rv64i_m/privilege/src/WALLY-periph.S" -// }; - - string wally32d[] = '{ `WALLYTEST, "rv32i_m/D/src/WALLY-fld.S" - }; - -// string wally32i[] = '{ -// `WALLYTEST, -// "rv32i_m/I/src/WALLY-ADD.S", -// "rv32i_m/I/src/WALLY-SLT.S", -// "rv32i_m/I/src/WALLY-SLTU.S", -// "rv32i_m/I/src/WALLY-SUB.S", -// "rv32i_m/I/src/WALLY-XOR.S" -// }; - -// string wally32priv[] = '{ -// `WALLYTEST, -// "rv32i_m/privilege/src/WALLY-csr-permission-s-01.S", -// "rv32i_m/privilege/src/WALLY-csr-permission-u-01.S", -// "rv32i_m/privilege/src/WALLY-mie-01.S", -// "rv32i_m/privilege/src/WALLY-minfo-01.S", -// "rv32i_m/privilege/src/WALLY-misa-01.S", -// "rv32i_m/privilege/src/WALLY-mmu-sv32.S", -// "rv32i_m/privilege/src/WALLY-mtvec-01.S", -// "rv32i_m/privilege/src/WALLY-pma.S", -// "rv32i_m/privilege/src/WALLY-pmp.S", -// "rv32i_m/privilege/src/WALLY-sie-01.S", -// "rv32i_m/privilege/src/WALLY-status-mie-01.S", -// "rv32i_m/privilege/src/WALLY-status-sie-01.S", -// "rv32i_m/privilege/src/WALLY-status-tw-01.S", -// "rv32i_m/privilege/src/WALLY-stvec-01.S", -// "rv32i_m/privilege/src/WALLY-trap-01.S", -// "rv32i_m/privilege/src/WALLY-trap-s-01.S", -// "rv32i_m/privilege/src/WALLY-trap-sret-01.S", -// "rv32i_m/privilege/src/WALLY-trap-u-01.S", -// "rv32i_m/privilege/src/WALLY-wfi-01.S" -// }; + }; \ No newline at end of file diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-plic-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-plic-01.S index 81a48a23f..e6c2ef417 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-plic-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-plic-01.S @@ -23,6 +23,9 @@ #include "WALLY-TEST-LIB-32.h" +RVTEST_ISA("RV32I") +RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",plic) + INIT_TESTS TRAP_HANDLER m diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-plic-s-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-plic-s-01.S index 45b87c4b1..f43de1bd3 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-plic-s-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-plic-s-01.S @@ -23,6 +23,9 @@ #include "WALLY-TEST-LIB-32.h" +RVTEST_ISA("RV32I") +RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",plic-s) + INIT_TESTS TRAP_HANDLER m diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-pmp.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-pmp.S index cf03edd74..0f93d4086 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-pmp.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-pmp.S @@ -24,7 +24,7 @@ #include "WALLY-TEST-LIB-32.h" RVTEST_ISA("RV32I") -RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;",pmp) +RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",pmp) INIT_TESTS diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-uart-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-uart-01.S index 08b1dc25e..1547cee43 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-uart-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-uart-01.S @@ -23,6 +23,9 @@ #include "WALLY-TEST-LIB-32.h" +RVTEST_ISA("RV32I") +RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",uart) + INIT_TESTS TRAP_HANDLER m diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-01.reference_output b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-01.reference_output index 71d93833b..d77998a66 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-01.reference_output +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-01.reference_output @@ -14,13 +14,13 @@ 00000000 00000003 # mcause from Breakpoint 00000000 -80000400 # mtval of breakpoint instruction adress (0x80000400) +800003f4 # mtval of breakpoint instruction adress (0x80000400) 00000000 00001880 # masked out mstatus.MPP = 11, mstatus.MPIE = 1, and mstatus.MIE = 0 00000000 00000004 # mcause from load address misaligned 00000000 -80000409 # mtval of misaligned address (0x80000409) +800003fd # mtval of misaligned address (0x80000409) 00000000 00001880 # masked out mstatus.MPP = 11, mstatus.MPIE = 1, and mstatus.MIE = 0 00000000 @@ -32,7 +32,7 @@ 00000000 00000006 # mcause from store misaligned 00000000 -80000421 # mtval of address with misaligned store instr (0x80000421) +80000415 # mtval of address with misaligned store instr (0x80000421) 00000000 00001880 # masked out mstatus.MPP = 11, mstatus.MPIE = 1, and mstatus.MIE = 0 00000000 @@ -126,13 +126,13 @@ ffffffff 00000000 00000003 # mcause from Breakpoint 00000000 -80000400 # mtval of breakpoint instruction adress (0x80000400) +800003f4 # mtval of breakpoint instruction adress (0x80000400) 00000000 00001880 # masked out mstatus.MPP = 11, mstatus.MPIE = 1, and mstatus.MIE = 0 00000000 00000004 # mcause from load address misaligned 00000000 -80000409 # mtval of misaligned address (0x80000409) +800003fd # mtval of misaligned address (0x80000409) 00000000 00001880 # masked out mstatus.MPP = 11, mstatus.MPIE = 1, and mstatus.MIE = 0 00000000 @@ -144,7 +144,7 @@ ffffffff 00000000 00000006 # mcause from store misaligned 00000000 -80000421 # mtval of address with misaligned store instr (0x80000421) +80000415 # mtval of address with misaligned store instr (0x80000421) 00000000 00001880 # masked out mstatus.MPP = 11, mstatus.MPIE = 1, and mstatus.MIE = 0 00000000 diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-s-01.reference_output b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-s-01.reference_output index e837095d4..fe559dfb7 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-s-01.reference_output +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-s-01.reference_output @@ -20,13 +20,13 @@ 00000000 00000003 # scause from Breakpoint 00000000 -80000400 # stval of breakpoint instruction adress (0x80000400) +800003f4 # stval of breakpoint instruction adress (0x80000400) 00000000 00000800 # masked out mstatus.mpp = 1, mstatus.MPIE = 0, and mstatus.MIE = 0 00000000 00000004 # scause from load address misaligned 00000000 -80000409 # stval of misaligned address (0x80000409) +800003fd # stval of misaligned address (0x80000409) 00000000 00000800 # masked out mstatus.mpp = 1, mstatus.MPIE = 0, and mstatus.MIE = 0 00000000 @@ -38,7 +38,7 @@ 00000000 00000006 # scause from store misaligned 00000000 -80000421 # stval of address with misaligned store instr (0x80000421) +80000415 # stval of address with misaligned store instr (0x80000421) 00000000 00000800 # masked out mstatus.mpp = 1, mstatus.MPIE = 0, and mstatus.MIE = 0 00000000 @@ -130,13 +130,13 @@ ffffffff 00000000 00000003 # scause from Breakpoint 00000000 -80000400 # stval of breakpoint instruction adress (0x80000400) +800003f4 # stval of breakpoint instruction adress (0x80000400) 00000000 00000120 # masked out sstatus.SPP = 1, sstatus.SPIE = 1, and sstatus.SIE = 0 00000000 00000004 # scause from load address misaligned 00000000 -80000409 # stval of misaligned address (0x80000409) +800003fd # stval of misaligned address (0x80000409) 00000000 00000120 # masked out sstatus.SPP = 1, sstatus.SPIE = 1, and sstatus.SIE = 0 00000000 @@ -148,7 +148,7 @@ ffffffff 00000000 00000006 # scause from store misaligned 00000000 -80000421 # stval of address with misaligned store instr (0x80000421) +80000415 # stval of address with misaligned store instr (0x80000421) 00000000 00000120 # masked out sstatus.SPP = 1, sstatus.SPIE = 1, and sstatus.SIE = 0 00000000 diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-u-01.reference_output b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-u-01.reference_output index b0fe37c33..39f874ef7 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-u-01.reference_output +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-u-01.reference_output @@ -20,13 +20,13 @@ 00000000 00000003 # scause from Breakpoint 00000000 -80000400 # stval of breakpoint instruction adress (0x80000400) +800003f4 # stval of breakpoint instruction adress (0x80000400) 00000000 00000000 # masked out mstatus.mpp = 0, mstatus.MPIE = 0, and mstatus.MIE = 0 00000000 00000004 # scause from load address misaligned 00000000 -80000409 # stval of misaligned address (0x80000409) +800003fd # stval of misaligned address (0x80000409) 00000000 00000000 # masked out mstatus.mpp = 0, mstatus.MPIE = 0, and mstatus.MIE = 0 00000000 @@ -38,7 +38,7 @@ 00000000 00000006 # scause from store misaligned 00000000 -80000421 # stval of address with misaligned store instr (0x80000421) +80000415 # stval of address with misaligned store instr (0x80000421) 00000000 00000000 # masked out mstatus.mpp = 0, mstatus.MPIE = 0, and mstatus.MIE = 0 00000000 @@ -116,13 +116,13 @@ ffffffff 00000000 00000003 # scause from Breakpoint 00000000 -80000400 # stval of breakpoint instruction adress (0x80000400) +800003f4 # stval of breakpoint instruction adress (0x80000400) 00000000 00000020 # masked out sstatus.SPP = 0, sstatus.SPIE = 1, and sstatus.SIE = 0 00000000 00000004 # scause from load address misaligned 00000000 -80000409 # stval of misaligned address (0x80000409) +800003fd # stval of misaligned address (0x80000409) 00000000 00000020 # masked out sstatus.SPP = 0, sstatus.SPIE = 1, and sstatus.SIE = 0 00000000 @@ -134,7 +134,7 @@ ffffffff 00000000 00000006 # scause from store misaligned 00000000 -80000421 # stval of address with misaligned store instr (0x80000421) +80000415 # stval of address with misaligned store instr (0x80000421) 00000000 00000020 # masked out sstatus.SPP = 0, sstatus.SPIE = 1, and sstatus.SIE = 0 00000000 diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-pmp.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-pmp.S index 62e1befe1..fc3864d38 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-pmp.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-pmp.S @@ -23,7 +23,7 @@ #include "WALLY-TEST-LIB-64.h" RVTEST_ISA("RV64I") -RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",pmp) +RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",pmp) INIT_TESTS diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-sie-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-sie-01.S index 2cd57164b..e9a9e443b 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-sie-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-sie-01.S @@ -23,7 +23,7 @@ #include "WALLY-TEST-LIB-64.h" RVTEST_ISA("RV64I") -RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",status-sie) +RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",status-sie) INIT_TESTS diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-tw-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-tw-01.S index 8b85c7d64..184b022ed 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-tw-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-tw-01.S @@ -24,7 +24,7 @@ #include "WALLY-TEST-LIB-64.h" RVTEST_ISA("RV64I") -RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",status-tw) +RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",status-tw) INIT_TESTS