Merge branch 'main' of https://github.com/openhwgroup/cvw into Z_enable

bin/wally-tool-chain-install.sh

@@ -276,7 +276,7 @@ cd "$RISCV"
 # Temporarily pin riscv-gnu-toolchain to use GCC 13.2.0. GCC 14 does not work with the Q extension.
 if git_check "riscv-gnu-toolchain" "https://github.com/riscv/riscv-gnu-toolchain" "$RISCV/riscv-gnu-toolchain/stamps/build-gcc-newlib-stage2"; then
     cd "$RISCV"/riscv-gnu-toolchain
-    git reset --hard && git clean -f && git checkout master && git pull
+    git reset --hard && git clean -f && git checkout master && git pull && git submodule update
     ./configure --prefix="${RISCV}" --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;"
     make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ]
     if [ "$clean" ]; then

linux/Makefile

@@ -60,7 +60,7 @@ install: check_write_permissions check_environment
 
 dumptvs: check_write_permissions check_environment
 	$(SUDO) mkdir -p $(RISCV)/linux-testvectors
-	cd testvector-generation; ./genInitMem.sh
+	./genInitMem.sh
 	@echo "Testvectors successfully generated."
 
 generate: $(DTB) $(IMAGES)

linux/bootmem.txt

@@ -1,12 +0,0 @@
-00001000: 00000297		auipc t0, 0		# t0 = 0x00001000
-00001004: 02828613		addi a2, t0,0x28	# a2 = 0x00001028
-00001008: f1402573		csrr a0, mhartid	# a0 = mhartid
-0000100c: 0202b583		ld a1, 32(t0) 		# a1 = 87000000 - device tree address
-00001010: 0182b283		ld t0, 24(t0)		# t0 = 80000000 - start of firmware
-00001014: 00028067		jr t0			# jump to firmware
-00001018: 0000000080000000			# firmware start address
-00001020: 000000008fe00000			# flattened device tree load address
-00001028: 000000004942534f			# a2 points to this 8 dword data structure
-00001030: 0000000000000002
-00001038: 0000000080200000
-00001040: 0000000000000001

linux/genInitMem.sh

@@ -46,9 +46,12 @@ echo "Launching QEMU in replay mode!"
 -ex "q"
 
 echo "Changing Endianness"
-make fixBinMem
+# Extend files to 8 byte multiple
-./fixBinMem "$rawRamFile" "$ramFile"
+truncate -s %8 "$rawRamFile"
-./fixBinMem "$rawBootmemFile" "$bootmemFile"
+truncate -s %8 "$rawBootmemFile"
+# Reverse bytes
+objcopy --reverse-bytes=8 -F binary "$rawRamFile" "$ramFile"
+objcopy --reverse-bytes=8 -F binary "$rawBootmemFile" "$bootmemFile"
 rm -f "$rawRamFile" "$rawBootmemFile" "$rawUntrimmedBootmemFile"
 
 echo "genInitMem.sh completed!"

linux/testvector-generation/Makefile

@@ -1,13 +0,0 @@
-SHELL = /bin/sh
-
-CFLAG = -Wall -g
-CC = gcc
-
-all: fixBinMem
-
-fixBinMem: fixBinMem.c
-	${CC} ${CFLAGS} fixBinMem.c -o fixBinMem
-	chmod +x fixBinMem
-
-clean:
-	-rm -f fixBinMem

linux/testvector-generation/fixBinMem.c

@@ -1,33 +0,0 @@
-#include <stdio.h>
-#include <stdlib.h>
-#include <stdint.h>
-int main(int argc, char *argv[]) {
-    if (argc < 3){
-        fprintf(stderr, "Expected 2 arguments: <raw GDB dump> <output binary>\n");
-        exit(1);
-    }
-    char* rawGDBfilePath = argv[1];
-    FILE* rawGDBfile;
-    if ((rawGDBfile = fopen(rawGDBfilePath,"rb"))==NULL) {
-        fprintf(stderr, "File not found: %s\n",rawGDBfilePath);
-        exit(1);
-    }
-    char* outFilePath = argv[2];
-    FILE* outFile = fopen(outFilePath,"w");
-    uint64_t qemuWord;
-    uint64_t verilogWord;
-    int bytesReturned=0;
-    do {
-        bytesReturned=fread(&qemuWord, 8, 1, rawGDBfile);
-        verilogWord = (((qemuWord>>0 )&0xff)<<56 | 
-                       ((qemuWord>>8 )&0xff)<<48 | 
-                       ((qemuWord>>16)&0xff)<<40 | 
-                       ((qemuWord>>24)&0xff)<<32 | 
-                       ((qemuWord>>32)&0xff)<<24 | 
-                       ((qemuWord>>40)&0xff)<<16 | 
-                       ((qemuWord>>48)&0xff)<<8  | 
-                       ((qemuWord>>56)&0xff)<<0);
-        fwrite(&verilogWord, 8, 1, outFile);
-    } while(bytesReturned!=0);
-    return 0;
-}