diff --git a/testbench/common/ramxdetector.sv b/testbench/common/ramxdetector.sv
index 987bbefea..c600cff8c 100644
--- a/testbench/common/ramxdetector.sv
+++ b/testbench/common/ramxdetector.sv
@@ -36,7 +36,9 @@ module ramxdetector #(parameter XLEN, LLEN) (
 );
 
   always_ff @(posedge clk)
+    /* verilator lint_off WIDTHXZEXPAND */
     if (MemReadM & ~LSULoadAccessFaultM & (ReadDataM === 'bx)) begin
+      /* verilator lint_on WIDTHXZEXPAND */
       $display("WARNING: Attempting to read from unitialized RAM.  Processor may go haywire if it uses x value. But this is normal in WALLY-mmu tests.");
       $display("  PCM = %x InstrM = %x (%s), IEUAdrM = %x", PCM, InstrM, InstrMName, IEUAdrM);
       //$stop;
diff --git a/testbench/common/riscvassertions.sv b/testbench/common/riscvassertions.sv
index 815478390..dcbe7e32a 100644
--- a/testbench/common/riscvassertions.sv
+++ b/testbench/common/riscvassertions.sv
@@ -42,7 +42,7 @@ module riscvassertions import cvw::*; #(parameter cvw_t P);
     assert (2**$clog2(P.ICACHE_WAYSIZEINBYTES) == P.ICACHE_WAYSIZEINBYTES || (!P.ICACHE_SUPPORTED)) else $error("ICACHE_WAYSIZEINBYTES must be a power of 2");
     assert (2**$clog2(P.ITLB_ENTRIES) == P.ITLB_ENTRIES || P.VIRTMEM_SUPPORTED==0) else $error("ITLB_ENTRIES must be a power of 2");
     assert (2**$clog2(P.DTLB_ENTRIES) == P.DTLB_ENTRIES || P.VIRTMEM_SUPPORTED==0) else $error("DTLB_ENTRIES must be a power of 2");
-    assert (P.UNCORE_RAM_RANGE >= 56'h07FFFFFF) else $warning("Some regression tests will fail if UNCORE_RAM_RANGE is less than 56'h07FFFFFF");
+    assert (P.UNCORE_RAM_RANGE >= 64'h07FFFFFF) else $warning("Some regression tests will fail if UNCORE_RAM_RANGE is less than 64'h07FFFFFF");
 	  assert (P.ZICSR_SUPPORTED == 1 || (P.PMP_ENTRIES == 0 && P.VIRTMEM_SUPPORTED == 0)) else $error("PMP_ENTRIES and VIRTMEM_SUPPORTED must be zero if ZICSR not supported.");
     assert (P.ZICSR_SUPPORTED == 1 || (P.S_SUPPORTED == 0 && P.U_SUPPORTED == 0)) else $error("S and U modes not supported if ZICSR not supported");
     assert (P.U_SUPPORTED || (P.S_SUPPORTED == 0)) else $error ("S mode only supported if U also is supported");
diff --git a/testbench/testbench.sv b/testbench/testbench.sv
index f8a174a1b..3d7e0d5df 100644
--- a/testbench/testbench.sv
+++ b/testbench/testbench.sv
@@ -561,7 +561,9 @@ module testbench;
     testadr = ($unsigned(begin_signature_addr))/(P.XLEN/8);
     testadrNoBase = (begin_signature_addr - P.UNCORE_RAM_BASE)/(P.XLEN/8);
     /* verilator lint_off INFINITELOOP */
+    /* verilator lint_off WIDTHXZEXPAND */
     while (signature[i] !== 'bx) begin
+      /* verilator lint_on WIDTHXZEXPAND */
       logic [P.XLEN-1:0] sig;
       // **************************************
       // ***** BUG BUG BUG make sure RT undoes this.