Merge pull request #294 from davidharrishmc/main

Defined empty RVMODEL interrupt macros to make riscof warnings go away

examples/C/common/test.ld

@@ -28,8 +28,8 @@ SECTIONS
   . = ALIGN(0x1000);
   .tohost : { *(.tohost) }
 
-  . = ALIGN(0x1000);
-  .text : { *(.text) }
+/*  . = ALIGN(0x1000);
+  .text : { *(.text) } */
 
   /* data segment */
   .data : { *(.data) }

tests/riscof/sail_cSim/env/model_test.h

@@ -51,5 +51,17 @@
 
 #define RVMODEL_CLEAR_MEXT_INT
 
+#define RVMODEL_CLR_MSW_INT
+#define RVMODEL_CLR_MTIMER_INT
+#define RVMODEL_CLR_MEXT_INT
+#define RVMODEL_SET_SSW_INT
+#define RVMODEL_CLR_SSW_INT
+#define RVMODEL_CLR_STIMER_INT
+#define RVMODEL_CLR_SEXT_INT
+#define RVMODEL_SET_VSW_INT
+#define RVMODEL_CLR_VSW_INT
+#define RVMODEL_CLR_VTIMER_INT
+#define RVMODEL_CLR_VEXT_INT
+
 
 #endif // _COMPLIANCE_MODEL_H

tests/riscof/sail_cSim/riscof_sail_cSim.py

@@ -94,7 +94,8 @@ class sail_cSim(pluginTemplate):
 
             execute = "@cd "+testentry['work_dir']+";"
 
-            cmd = self.compile_cmd.format(testentry['isa'].lower().replace('zicsr', ' ', 1), self.xlen) + ' ' + test + ' -o ' + elf
+#            cmd = self.compile_cmd.format(testentry['isa'].lower().replace('zicsr', ' ', 1), self.xlen) + ' ' + test + ' -o ' + elf
+            cmd = self.compile_cmd.format(testentry['isa'].lower(), self.xlen) + ' ' + test + ' -o ' + elf
             compile_cmd = cmd + ' -D' + " -D".join(testentry['macros'])
             execute+=compile_cmd+";"
 

tests/riscof/spike/env/model_test.h

@@ -56,5 +56,17 @@
 
 #define RVMODEL_CLEAR_MEXT_INT
 
+#define RVMODEL_CLR_MSW_INT
+#define RVMODEL_CLR_MTIMER_INT
+#define RVMODEL_CLR_MEXT_INT
+#define RVMODEL_SET_SSW_INT
+#define RVMODEL_CLR_SSW_INT
+#define RVMODEL_CLR_STIMER_INT
+#define RVMODEL_CLR_SEXT_INT
+#define RVMODEL_SET_VSW_INT
+#define RVMODEL_CLR_VSW_INT
+#define RVMODEL_CLR_VTIMER_INT
+#define RVMODEL_CLR_VEXT_INT
+
 
 #endif // _COMPLIANCE_MODEL_H

tests/riscof/spike/riscof_spike.py

@@ -159,7 +159,8 @@ class spike(pluginTemplate):
 
           # substitute all variables in the compile command that we created in the initialize
           # function
-          cmd = self.compile_cmd.format(testentry['isa'].lower().replace('zicsr', ' ', 2), self.xlen, test, elf, compile_macros)
+#          cmd = self.compile_cmd.format(testentry['isa'].lower().replace('zicsr', ' ', 2), self.xlen, test, elf, compile_macros)
+          cmd = self.compile_cmd.format(testentry['isa'].lower(), self.xlen, test, elf, compile_macros)
 
 	  # if the user wants to disable running the tests and only compile the tests, then
 	  # the "else" clause is executed below assigning the sim command to simple no action

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-clint-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-32.h" 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",clint) 
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-csr-permission-s-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h" 
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;",csr-permission-s)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-csr-permission-u-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h" 
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;",csr-permission-u)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-endianness-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h" 
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",endianness)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-gpio-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h" 
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",gpio)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-mie-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",mie)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-minfo-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;",minfo)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-misa-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;",misa)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-mmu-sv32-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h" 
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr_Zifencei")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;",mmu)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-mmu-sv32-svadu-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h" 
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True; def NO_SAIL=True;",mmu)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-mtvec-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",mtvec)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-periph-01.S

@@ -23,7 +23,7 @@
 #include "model_test.h"
 #include "arch_test.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 // this test is blocked, it won't build or run. To unblock it remove the check ISA:=regex(BLOCKED); 
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True",periph)
 

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-plic-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h" 
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",plic)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-plic-s-01.S

@@ -24,7 +24,7 @@
 
 #include "WALLY-TEST-LIB-32.h" 
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",plic-s)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-pma-01.S

@@ -36,7 +36,7 @@
 
 #include "WALLY-TEST-LIB-32.h" 
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",pma)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-pmp-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h" 
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",pmp)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-satp-invalid-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-32.h" 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True; def TEST_CASE_1=True;",satp-invalid)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-sie-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",sie)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-status-fp-enabled-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32IAF")
+RVTEST_ISA("RV32IAF_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*A.*F.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;",status-fp-enabled)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-status-mie-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;",status-mie)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-status-sie-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",status-sie)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-status-tvm-01.S

@@ -24,7 +24,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;", status-tvm)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-status-tw-01.S

@@ -24,7 +24,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;", status-tw)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-stvec-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",stvec)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-trap-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",trap)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-trap-s-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def NO_SAIL=True;",trap-s)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-trap-sret-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",trap-sret)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-trap-u-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",trap-u)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-uart-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h" 
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",uart)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-uart-timeout-01.S

@@ -24,7 +24,7 @@
 
 #include "WALLY-TEST-LIB-32.h" 
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",uart-timeout)
 
 .equ UART, 0x10000000

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-wfi-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-32.h"
 
-RVTEST_ISA("RV32I")
+RVTEST_ISA("RV32I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",wfi)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/Zifencei/src/Fencei.S

@@ -9,7 +9,7 @@
 #include "arch_test.h"
 
 # Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zifencei")
 
 # Test code region
 .section .text.init

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-csr-permission-s-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-64.h" 
 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",csr-permission-s)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-csr-permission-u-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-64.h" 
 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",csr-permission-u)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-endianness-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-64.h" 
 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True; def NO_SAIL=True;",endianness)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-gpio-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-64.h" 
 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",gpio)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-mie-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",mie)
 INIT_TESTS
 

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-minfo-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",minfo)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-misa-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",misa)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-mmu-sv39-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h" 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr_Zifencei")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",mmu-sv39)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-mmu-sv39-svadu-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h" 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True",mmu-sv39)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-mmu-sv48-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h" 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr_Zifencei")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sv48)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-mmu-sv48-svadu-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h" 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True",sv48)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-mtvec-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True; def NO_SAIL=True;",mtvec)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-periph-01.S

@@ -23,7 +23,7 @@
 #include "model_test.h"
 #include "arch_test.h"
 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 // this test is blocked, it won't build or run. To unblock it remove the check ISA:=regex(BLOCKED); 
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True",periph)
 

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-plic-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-64.h" 
 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",plic)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-plic-s-01.S

@@ -24,7 +24,7 @@
 
 #include "WALLY-TEST-LIB-64.h" 
 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",plic-s)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-pma-01.S

@@ -35,7 +35,7 @@
 #define PLIC_RANGE     0x03FFFFFF
 
 #include "WALLY-TEST-LIB-64.h" 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",pma)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-pmp-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h" 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",pmp)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-satp-invalid-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h" 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True; def TEST_CASE_1=True;",satp-invalid)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-sie-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",sie)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-fp-enabled-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64IAF")
+RVTEST_ISA("RV64IAF_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*A.*F.*);def TEST_CASE_1=True;",status-fp-enabled)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-mie-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",status-mie)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-sie-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",status-sie)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-tvm-01.S

@@ -24,7 +24,7 @@
 
 #include "WALLY-TEST-LIB-64.h"
 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;", status-tvm)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-tw-01.S

@@ -23,7 +23,7 @@
 
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",status-tw)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-xlen-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-64.h" 
 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",xlen)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-stvec-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True; def NO_SAIL=True;",stvec)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-trap-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",trap)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-trap-s-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",trap-s)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-trap-sret-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",trap-sret)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-trap-u-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",trap-u)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-uart-01.S

@@ -23,7 +23,7 @@
 
 #include "WALLY-TEST-LIB-64.h" 
 
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",uart)
 
 INIT_TESTS

tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-wfi-01.S

@@ -22,7 +22,7 @@
 ///////////////////////////////////////////
 
 #include "WALLY-TEST-LIB-64.h"
-RVTEST_ISA("RV64I")
+RVTEST_ISA("RV64I_Zicsr")
 RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;def NO_SAIL=True;",wfi)
 
 INIT_TESTS