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Linux now boots fpga.
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@ -275,6 +275,7 @@ module sd_top #(parameter g_COUNT_WIDTH = 8)
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(* mark_debug = "true" *)logic [15:0] r_DAT3_CRC16, r_DAT2_CRC16, r_DAT1_CRC16;
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(* mark_debug = "true" *)logic [15:0] r_DAT0_CRC16;
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(* mark_debug = "true" *) logic w_IC_EN_Q;
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assign w_BLOCK_ADDR = {8'h00, i_BLOCK_ADDR}; // (40 downto 36 are zero since card is 64 GB)
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// (35 downto 32 are zero since memeory is only 8GB total)
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@ -483,11 +484,18 @@ module sd_top #(parameter g_COUNT_WIDTH = 8)
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(.CountIn('0), // No CountIn, only RESET
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.CountOut(r_IC_OUT),
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.Load(1'b0), // No LOAD, only RESET
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.Enable(w_IC_EN),
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.Enable(w_IC_EN_Q),
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.UpDown(w_IC_UP_DOWN),
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.clk(r_G_CLK_SD),
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.reset(w_IC_RST));
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flopr #(1) w_IC_EN_Q_reg
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(.clk(~r_G_CLK_SD),
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.reset(a_RST),
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.d(w_IC_EN),
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.q(w_IC_EN_Q));
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// Clock selection
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clkdivider #(g_COUNT_WIDTH) slow_clk_divider // Divide 50 MHz to <400 KHz (Initial clock)
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(.i_COUNT_IN_MAX(i_COUNT_IN_MAX),
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Load Diff
@ -35,9 +35,9 @@ module up_down_counter #(parameter integer WIDTH=32)
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input logic clk,
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input logic reset);
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logic [WIDTH-1:0] NextCount;
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(* mark_debug = "true" *)logic [WIDTH-1:0] NextCount;
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logic [WIDTH-1:0] count_q;
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logic [WIDTH-1:0] CountP1;
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(* mark_debug = "true" *)logic [WIDTH-1:0] CountP1;
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flopenr #(WIDTH) reg1(.clk,
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.reset,
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