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rom1p1r code cleanup
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@ -43,9 +43,9 @@ module rom1p1r #(parameter ADDR_WIDTH = 8,
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rom1p1r_128x32 rom1 (.CLK(clk), .CEB(~ce), .A(addr[6:0]), .Q(dout));
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rom1p1r_128x32 rom1 (.CLK(clk), .CEB(~ce), .A(addr[6:0]), .Q(dout));
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end else begin */
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end else begin */
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always @ (posedge clk) begin
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always @ (posedge clk)
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if(ce) dout <= ROM[addr];
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if(ce) dout <= ROM[addr];
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end
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// for FPGA, initialize with zero-stage bootloader
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// for FPGA, initialize with zero-stage bootloader
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if(PRELOAD_ENABLED) begin
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if(PRELOAD_ENABLED) begin
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