diff --git a/pipelined/src/fpu/fpu.sv b/pipelined/src/fpu/fpu.sv
index da15a45b7..4ae12462d 100755
--- a/pipelined/src/fpu/fpu.sv
+++ b/pipelined/src/fpu/fpu.sv
@@ -129,7 +129,7 @@ module fpu (
    //divide signals
    logic [`DIVb:0]      QmM;
    logic [`NE+1:0]      QeE, QeM; 
-   logic                DivSE, DivSM;
+   logic                DivSM;
 //   logic                DivDoneM;
    logic                FDivDoneE, IFDivStartE;