From 3dc1c6673dbb2ee5f6a4548e1387154d15c69a29 Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Tue, 28 Mar 2023 21:13:25 -0700
Subject: [PATCH] Started adding fpu fctrl tests

---
 testbench/tests.vh      |  1 +
 tests/coverage/Makefile |  2 +-
 tests/coverage/fpu.S    | 69 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 71 insertions(+), 1 deletion(-)
 create mode 100644 tests/coverage/fpu.S

diff --git a/testbench/tests.vh b/testbench/tests.vh
index 79f100d4f..fab26208a 100644
--- a/testbench/tests.vh
+++ b/testbench/tests.vh
@@ -47,6 +47,7 @@ string tvpaths[] = '{
     "ieu",
     "ebu",
     "csrwrites",
+    "fpu",
     "priv"
   };
 
diff --git a/tests/coverage/Makefile b/tests/coverage/Makefile
index 7d4552af2..b2a2544d3 100644
--- a/tests/coverage/Makefile
+++ b/tests/coverage/Makefile
@@ -17,7 +17,7 @@ all: $(OBJECTS)
 
 # Change many things if bit width isn't 64
 %.elf: $(SRCDIR)/%.$(SEXT) WALLY-init-lib.h Makefile
-	riscv64-unknown-elf-gcc -g -o $@ -march=rv64gc_zba_zbb_zbc_zbs -mabi=lp64 -mcmodel=medany \
+	riscv64-unknown-elf-gcc -g -o $@ -march=rv64gqc_zba_zbb_zbc_zbs_zfh -mabi=lp64 -mcmodel=medany \
 	    -nostartfiles -T../../examples/link/link.ld $<
 	riscv64-unknown-elf-objdump -S $@ > $@.objdump
 	riscv64-unknown-elf-elf2hex --bit-width 64 --input $@ --output $@.memfile
diff --git a/tests/coverage/fpu.S b/tests/coverage/fpu.S
new file mode 100644
index 000000000..34924a40a
--- /dev/null
+++ b/tests/coverage/fpu.S
@@ -0,0 +1,69 @@
+///////////////////////////////////////////
+// fpu.S
+//
+// Written: David_Harris@hmc.edu 28 March 2023
+//
+// Purpose: Test coverage for FPU
+//
+// A component of the CORE-V-WALLY configurable RISC-V project.
+// 
+// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
+//
+// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+//
+// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file 
+// except in compliance with the License, or, at your option, the Apache License version 2.0. You 
+// may obtain a copy of the License at
+//
+// https://solderpad.org/licenses/SHL-2.1/
+//
+// Unless required by applicable law or agreed to in writing, any work distributed under the 
+// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, 
+// either express or implied. See the License for the specific language governing permissions 
+// and limitations under the License.
+////////////////////////////////////////////////////////////////////////////////////////////////
+
+// load code to initalize stack, handle interrupts, terminate
+#include "WALLY-init-lib.h"
+
+main:
+
+    # Test legal instructions not covered elsewhere
+    flq ft0, 0(a0)
+    flh ft0, 8(a0)
+    fsq ft0, 0(a0)
+    fsh ft0, 8(a0)
+    fcvt.h.s ft1, ft0
+    fcvt.q.s ft2, ft0
+    fcvt.h.w ft3, a0
+    fcvt.h.wu ft3, a0
+    fcvt.h.l ft3, a0
+    fcvt.h.lu ft3, a0
+    fcvt.w.h a0, ft3
+    fcvt.wu.h a0, ft3
+    fcvt.l.h a0, ft3
+    fcvt.lu.h a0, ft3
+    fcvt.q.w ft3, a0
+    fcvt.q.wu ft3, a0
+    fcvt.q.l ft3, a0
+    fcvt.q.lu ft3, a0
+    fcvt.w.q a0, ft3
+    fcvt.wu.q a0, ft3
+    fcvt.l.q a0, ft3
+    fcvt.lu.q a0, ft3
+
+ 
+    # Test illegal instructions are detected
+    .word 0x00000007 // illegal floating-point load (bad Funct3)
+    .word 0x00000027 // illegal floating-point store (bad Funct3)
+    .word 0x58F00053 // illegal fsqrt (bad Rs2D)
+    .word 0x20007053 // illegal fsgnj (bad Funct3)
+    .word 0x28007053 // illegal fmin/max (bad Funct3)
+    .word 0xA0007053 // illegal fcmp (bad Funct3)
+    .word 0xE0007053 // illegal fclass/fmv (bad Funct3)
+    .word 0xF0007053 // illegal fmv (bad Funct3)
+    .word 0x43007053 // illegal fcvt.d.* (bad Rs2D)
+    .word 0x42207053 // illegal fcvt.d.* (bad Rs2D[1])
+
+    j done
+