mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
Merge branch 'main' of github.com:openhwgroup/cvw
This commit is contained in:
commit
3c1ce7f7d9
@ -44,6 +44,7 @@ string tvpaths[] = '{
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string coverage64gc[] = '{
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string coverage64gc[] = '{
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`COVERAGE,
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`COVERAGE,
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"tlbNAPOT",
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"priv",
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"priv",
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"ieu",
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"ieu",
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"ebu",
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"ebu",
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184
tests/coverage/tlbNAPOT.S
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184
tests/coverage/tlbNAPOT.S
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@ -0,0 +1,184 @@
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///////////////////////////////////////////
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// tlbNAPOT.S
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//
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// Written: mmendozamanriquez@hmc.edu 4 April 2023
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// nlimpert@hmc.edu
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// Adapted David_Harris@hmc.edu 8/29/23 to exercise NAPOT huge pages
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//
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// Purpose: Test coverage for LSU NAPOT
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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//
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// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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// load code to initalize stack, handle interrupts, terminate
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#include "WALLY-init-lib.h"
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# run-elf.bash find this in project description
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main:
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# Page table root address at 0x80010000; SV48
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li t5, 0x9000000000080010
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csrw satp, t5
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# sfence.vma x0, x0
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# switch to supervisor mode
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li a0, 1
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ecall
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li t0, 0x80215240
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li t2, 0 # i = 0
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li t3, 33 # Max amount of Loops = 32
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li t4, 0x200000
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li t5, 0x8082 # return instruction opcode
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loop: bge t2, t3, finished # exit loop if i >= loops
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sw t5, 0(t0) # store a return at this address to exercise DTLB
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lw t1, 0(t0) # read it back
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fence.i # synchronize with I$
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jalr ra, t0 # jump to the return statement to exercise the ITLB
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add t0, t0, t4
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addi t2, t2, 1
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j loop
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finished:
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j done
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.data
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.align 16
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# root Page table situated at 0x80010000
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pagetable:
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.8byte 0x200044C1 // old page table was 200040 which just pointed to itself! wrong
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# next page table at 0x80011000
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.align 12
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.8byte 0x0000000000000000
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.8byte 0x00000000200048C1
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.8byte 0x00000000200048C1
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# Next page table at 0x80012000
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.align 12
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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# Leaf page table at 0x80013000
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.align 12
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#80000000
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.8byte 0x80000000200020CF
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.8byte 0x80000000200020CF
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.8byte 0x80000000200020CF
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.8byte 0x80000000200020CF
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.8byte 0x80000000200020CF
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.8byte 0x80000000200020CF
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.8byte 0x80000000200020CF
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.8byte 0x80000000200020CF
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.8byte 0x80000000200060CF
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.8byte 0x80000000200060CF
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.8byte 0x80000000200060CF
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.8byte 0x800000002000A0CF
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.8byte 0x800000002000E0CF
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.8byte 0x800000002000E0CF
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