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Wow. The newest version of Vivado does not like the enums as parameters.

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The solution is simple.  I changed the type to logic [31:0] and defined macros for the branch predictor types as 32 bit integers.
This commit is contained in:
Ross Thompson 2023-07-18 15:07:10 -05:00
parent 930e00b69b
commit 3bf2b35704
18 changed files with 46 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
config/buildroot/config.vh
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@ -138,7 +138,7 @@ localparam PLIC_UART_ID = 32'd10;
localparam PLIC_GPIO_ID = 32'd3; localparam PLIC_GPIO_ID = 32'd3;
localparam BPRED_SUPPORTED = 1; localparam BPRED_SUPPORTED = 1;
localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
localparam BPRED_SIZE = 32'd10; localparam BPRED_SIZE = 32'd10;
localparam BPRED_NUM_LHR = 32'd6; localparam BPRED_NUM_LHR = 32'd6;
localparam BTB_SIZE = 32'd10; localparam BTB_SIZE = 32'd10;

2
config/fpga/config.vh
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@ -151,7 +151,7 @@ localparam PLIC_GPIO_ID = 32'd3;
localparam PLIC_UART_ID = 32'd10; localparam PLIC_UART_ID = 32'd10;
localparam BPRED_SUPPORTED = 1; localparam BPRED_SUPPORTED = 1;
localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
localparam BPRED_NUM_LHR = 32'd6; localparam BPRED_NUM_LHR = 32'd6;
localparam BPRED_SIZE = 32'd12; localparam BPRED_SIZE = 32'd12;
localparam BTB_SIZE = 32'd10; localparam BTB_SIZE = 32'd10;

2
config/rv32e/config.vh
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@ -139,7 +139,7 @@ localparam PLIC_GPIO_ID = 32'd3;
localparam PLIC_UART_ID = 32'd10; localparam PLIC_UART_ID = 32'd10;
localparam BPRED_SUPPORTED = 0; localparam BPRED_SUPPORTED = 0;
localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
localparam BPRED_SIZE = 32'd10; localparam BPRED_SIZE = 32'd10;
localparam BPRED_NUM_LHR = 32'd6; localparam BPRED_NUM_LHR = 32'd6;
localparam BTB_SIZE = 32'd10; localparam BTB_SIZE = 32'd10;

2
config/rv32gc/config.vh
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@ -140,7 +140,7 @@ localparam PLIC_GPIO_ID = 32'd3;
localparam PLIC_UART_ID = 32'd10; localparam PLIC_UART_ID = 32'd10;
localparam BPRED_SUPPORTED = 1; localparam BPRED_SUPPORTED = 1;
localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
localparam BPRED_SIZE = 32'd16; localparam BPRED_SIZE = 32'd16;
localparam BPRED_NUM_LHR = 32'd6; localparam BPRED_NUM_LHR = 32'd6;
localparam BTB_SIZE = 32'd10; localparam BTB_SIZE = 32'd10;

2
config/rv32i/config.vh
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@ -139,7 +139,7 @@ localparam PLIC_GPIO_ID = 32'd3;
localparam PLIC_UART_ID = 32'd10; localparam PLIC_UART_ID = 32'd10;
localparam BPRED_SUPPORTED = 0; localparam BPRED_SUPPORTED = 0;
localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
localparam BPRED_SIZE = 32'd10; localparam BPRED_SIZE = 32'd10;
localparam BPRED_NUM_LHR = 32'd6; localparam BPRED_NUM_LHR = 32'd6;
localparam BTB_SIZE = 32'd10; localparam BTB_SIZE = 32'd10;

2
config/rv32imc/config.vh
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@ -138,7 +138,7 @@ localparam PLIC_GPIO_ID = 32'd3;
localparam PLIC_UART_ID = 32'd10; localparam PLIC_UART_ID = 32'd10;
localparam BPRED_SUPPORTED = 0; localparam BPRED_SUPPORTED = 0;
localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
localparam BPRED_SIZE = 32'd10; localparam BPRED_SIZE = 32'd10;
localparam BPRED_NUM_LHR = 32'd6; localparam BPRED_NUM_LHR = 32'd6;
localparam BTB_SIZE = 32'd10; localparam BTB_SIZE = 32'd10;

2
config/rv64fpquad/config.vh
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@ -141,7 +141,7 @@ localparam PLIC_GPIO_ID = 32'd3;
localparam PLIC_UART_ID = 32'd10; localparam PLIC_UART_ID = 32'd10;
localparam BPRED_SUPPORTED = 1; localparam BPRED_SUPPORTED = 1;
localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
localparam BPRED_SIZE = 32'd10; localparam BPRED_SIZE = 32'd10;
localparam BPRED_NUM_LHR = 32'd6; localparam BPRED_NUM_LHR = 32'd6;
localparam BTB_SIZE = 32'd10; localparam BTB_SIZE = 32'd10;

2
config/rv64gc/config.vh
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@ -144,7 +144,7 @@ localparam PLIC_GPIO_ID = 32'd3;
localparam PLIC_UART_ID = 32'd10; localparam PLIC_UART_ID = 32'd10;
localparam BPRED_SUPPORTED = 1; localparam BPRED_SUPPORTED = 1;
localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
localparam BPRED_NUM_LHR = 32'd6; localparam BPRED_NUM_LHR = 32'd6;
localparam BPRED_SIZE = 32'd10; localparam BPRED_SIZE = 32'd10;
localparam BTB_SIZE = 32'd10; localparam BTB_SIZE = 32'd10;

2
config/rv64i/config.vh
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@ -141,7 +141,7 @@ localparam PLIC_GPIO_ID = 32'd3;
localparam PLIC_UART_ID = 32'd10; localparam PLIC_UART_ID = 32'd10;
localparam BPRED_SUPPORTED = 0; localparam BPRED_SUPPORTED = 0;
localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
localparam BPRED_SIZE = 32'd10; localparam BPRED_SIZE = 32'd10;
localparam BPRED_NUM_LHR = 32'd6; localparam BPRED_NUM_LHR = 32'd6;
localparam BTB_SIZE = 32'd10; localparam BTB_SIZE = 32'd10;

11
config/shared/BranchPredictorType.vh
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@ -1,3 +1,8 @@
typedef enum logic[3:0] {BP_TWOBIT, BP_GSHARE, BP_GLOBAL, BP_GSHARE_BASIC, `define BP_TWOBIT (32'd0)
BP_GLOBAL_BASIC, BP_LOCAL_BASIC, BP_LOCAL_AHEAD, BP_LOCAL_REPAIR} BranchPredictorType; `define BP_GSHARE (32'd1)
`define BP_GLOBAL (32'd2)
`define BP_GSHARE_BASIC (32'd3)
`define BP_GLOBAL_BASIC (32'd4)
`define BP_LOCAL_BASIC (32'd5)
`define BP_LOCAL_AHEAD (32'd6)
`define BP_LOCAL_REPAIR (32'd7)

2
config/shared/parameter-defs.vh
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@ -1,6 +1,8 @@
// Populate parameter structure with values specific to the current configuration // Populate parameter structure with values specific to the current configuration
`include "BranchPredictorType.vh"
parameter cvw_t P = '{ parameter cvw_t P = '{
FPGA : FPGA, FPGA : FPGA,
QEMU : QEMU, QEMU : QEMU,

16
fpga/generator/Makefile
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@ -3,9 +3,9 @@ sdc_src := ~/repos/sdc.tar.gz
# Select the desired board and the all build rules # Select the desired board and the all build rules
# vcu118 # vcu118
export XILINX_PART := xcvu9p-flga2104-2L-e #export XILINX_PART := xcvu9p-flga2104-2L-e
export XILINX_BOARD := xilinx.com:vcu118:part0:2.4 #export XILINX_BOARD := xilinx.com:vcu118:part0:2.4
export board := vcu118 #export board := vcu118
# vcu108 # vcu108
#export XILINX_PART := xcvu095-ffva2104-2-e #export XILINX_PART := xcvu095-ffva2104-2-e
@ -13,15 +13,15 @@ export board := vcu118
#export board := vcu108 #export board := vcu108
# Arty A7 # Arty A7
#export XILINX_PART := xc7a100tcsg324-1 export XILINX_PART := xc7a100tcsg324-1
#export XILINX_BOARD := digilentinc.com:arty-a7-100:part0:1.1 export XILINX_BOARD := digilentinc.com:arty-a7-100:part0:1.1
#export board := ArtyA7 export board := ArtyA7
# for Arty A7 and S7 boards # for Arty A7 and S7 boards
#all: FPGA_Arty all: FPGA_Arty
# VCU 108 and VCU 118 boards # VCU 108 and VCU 118 boards
all: FPGA_VCU #all: FPGA_VCU
FPGA_Arty: PreProcessFiles IP_Arty SDC FPGA_Arty: PreProcessFiles IP_Arty SDC
vivado -mode tcl -source wally.tcl 2>&1 | tee wally.log vivado -mode tcl -source wally.tcl 2>&1 | tee wally.log

1
fpga/src/wallypipelinedsocwrapper.sv
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@ -25,6 +25,7 @@
// and limitations under the License. // and limitations under the License.
//////////////////////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////////////////////
//`include "BranchPredictorType.vh"
`include "config.vh" `include "config.vh"
import cvw::*; import cvw::*;

6
linux/testvector-generation/genInitMem.sh
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@ -1,7 +1,7 @@
#!/bin/bash #!/bin/bash
tcpPort=1235 tcpPort=1235
imageDir=$RISCV/buildroot/output/images imageDir=/home/ross/repos/buildroot/output/images
tvDir=$RISCV/linux-testvectors tvDir=linux-testvectors
rawRamFile="$tvDir/ramGDB.bin" rawRamFile="$tvDir/ramGDB.bin"
ramFile="$tvDir/ram.bin" ramFile="$tvDir/ram.bin"
rawBootmemFile="$tvDir/bootmemGDB.bin" rawBootmemFile="$tvDir/bootmemGDB.bin"
@ -36,7 +36,7 @@ then
echo "Launching QEMU in replay mode!" echo "Launching QEMU in replay mode!"
(qemu-system-riscv64 \ (qemu-system-riscv64 \
-M virt -dtb $RISCV/buildroot/output/images/wally-virt.dtb \ -M virt -dtb /home/ross/repos/buildroot/output/images/wally-artya7.dtb \
-nographic \ -nographic \
-bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio \ -bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio \
-gdb tcp::$tcpPort -S) \ -gdb tcp::$tcpPort -S) \

2
src/cvw.sv
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@ -144,7 +144,7 @@ typedef struct packed {
int PLIC_UART_ID; int PLIC_UART_ID;
logic BPRED_SUPPORTED; logic BPRED_SUPPORTED;
BranchPredictorType BPRED_TYPE; logic [31:0] BPRED_TYPE;
int BPRED_NUM_LHR; int BPRED_NUM_LHR;
int BPRED_SIZE; int BPRED_SIZE;
int BTB_SIZE; int BTB_SIZE;

18
src/ifu/bpred/bpred.sv
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@ -27,6 +27,8 @@
//////////////////////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////////////////////
`define INSTR_CLASS_PRED 1 `define INSTR_CLASS_PRED 1
`include "BranchPredictorType.vh"
module bpred import cvw::*; #(parameter cvw_t P) ( module bpred import cvw::*; #(parameter cvw_t P) (
input logic clk, reset, input logic clk, reset,
@ -96,45 +98,45 @@ module bpred import cvw::*; #(parameter cvw_t P) (
logic [P.XLEN-1:0] BPBTAE; logic [P.XLEN-1:0] BPBTAE;
// Part 1 branch direction prediction // Part 1 branch direction prediction
if (P.BPRED_TYPE == BP_TWOBIT) begin:Predictor if (P.BPRED_TYPE == `BP_TWOBIT) begin:Predictor
twoBitPredictor #(P, P.XLEN, P.BPRED_SIZE) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, twoBitPredictor #(P, P.XLEN, P.BPRED_SIZE) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW,
.FlushD, .FlushE, .FlushM, .FlushW, .FlushD, .FlushE, .FlushM, .FlushW,
.PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE, .PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE,
.BranchE, .BranchM, .PCSrcE); .BranchE, .BranchM, .PCSrcE);
end else if (P.BPRED_TYPE == BP_GSHARE) begin:Predictor end else if (P.BPRED_TYPE == `BP_GSHARE) begin:Predictor
gshare #(P, P.XLEN, P.BPRED_SIZE) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW, gshare #(P, P.XLEN, P.BPRED_SIZE) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
.PCNextF, .PCF, .PCD, .PCE, .PCM, .BPDirPredF, .BPDirPredWrongE, .PCNextF, .PCF, .PCD, .PCE, .PCM, .BPDirPredF, .BPDirPredWrongE,
.BPBranchF, .BranchD, .BranchE, .BranchM, .BranchW, .BPBranchF, .BranchD, .BranchE, .BranchM, .BranchW,
.PCSrcE); .PCSrcE);
end else if (P.BPRED_TYPE == BP_GLOBAL) begin:Predictor end else if (P.BPRED_TYPE == `BP_GLOBAL) begin:Predictor
gshare #(P, P.XLEN, P.BPRED_SIZE, 0) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW, gshare #(P, P.XLEN, P.BPRED_SIZE, 0) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
.PCNextF, .PCF, .PCD, .PCE, .PCM, .BPDirPredF, .BPDirPredWrongE, .PCNextF, .PCF, .PCD, .PCE, .PCM, .BPDirPredF, .BPDirPredWrongE,
.BPBranchF, .BranchD, .BranchE, .BranchM, .BranchW, .BPBranchF, .BranchD, .BranchE, .BranchM, .BranchW,
.PCSrcE); .PCSrcE);
end else if (P.BPRED_TYPE == BP_GSHARE_BASIC) begin:Predictor end else if (P.BPRED_TYPE == `BP_GSHARE_BASIC) begin:Predictor
gsharebasic #(P, P.XLEN, P.BPRED_SIZE) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW, gsharebasic #(P, P.XLEN, P.BPRED_SIZE) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
.PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE, .PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE,
.BranchE, .BranchM, .PCSrcE); .BranchE, .BranchM, .PCSrcE);
end else if (P.BPRED_TYPE == BP_GLOBAL_BASIC) begin:Predictor end else if (P.BPRED_TYPE == `BP_GLOBAL_BASIC) begin:Predictor
gsharebasic #(P, P.XLEN, P.BPRED_SIZE, 0) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW, gsharebasic #(P, P.XLEN, P.BPRED_SIZE, 0) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
.PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE, .PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE,
.BranchE, .BranchM, .PCSrcE); .BranchE, .BranchM, .PCSrcE);
end else if (P.BPRED_TYPE == BP_LOCAL_BASIC) begin:Predictor end else if (P.BPRED_TYPE == `BP_LOCAL_BASIC) begin:Predictor
localbpbasic #(P, P.XLEN, P.BPRED_NUM_LHR, P.BPRED_SIZE) DirPredictor(.clk, .reset, localbpbasic #(P, P.XLEN, P.BPRED_NUM_LHR, P.BPRED_SIZE) DirPredictor(.clk, .reset,
.StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
.PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE, .PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE,
.BranchE, .BranchM, .PCSrcE); .BranchE, .BranchM, .PCSrcE);
end else if (P.BPRED_TYPE == BP_LOCAL_AHEAD) begin:Predictor end else if (P.BPRED_TYPE == `BP_LOCAL_AHEAD) begin:Predictor
localaheadbp #(P, P.XLEN, P.BPRED_NUM_LHR, P.BPRED_SIZE) DirPredictor(.clk, .reset, localaheadbp #(P, P.XLEN, P.BPRED_NUM_LHR, P.BPRED_SIZE) DirPredictor(.clk, .reset,
.StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
.PCNextF, .PCM, .BPDirPredD(BPDirPredF), .BPDirPredWrongE, .PCNextF, .PCM, .BPDirPredD(BPDirPredF), .BPDirPredWrongE,
.BranchE, .BranchM, .PCSrcE); .BranchE, .BranchM, .PCSrcE);
end else if (P.BPRED_TYPE == BP_LOCAL_REPAIR) begin:Predictor end else if (P.BPRED_TYPE == `BP_LOCAL_REPAIR) begin:Predictor
localrepairbp #(P, P.XLEN, P.BPRED_NUM_LHR, P.BPRED_SIZE) DirPredictor(.clk, .reset, localrepairbp #(P, P.XLEN, P.BPRED_NUM_LHR, P.BPRED_SIZE) DirPredictor(.clk, .reset,
.StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
.PCNextF, .PCE, .PCM, .BPDirPredD(BPDirPredF), .BPDirPredWrongE, .PCNextF, .PCE, .PCM, .BPDirPredD(BPDirPredF), .BPDirPredWrongE,

4
testbench/testbench-xcelium.sv
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@ -328,7 +328,7 @@ module testbench;
if (P.UNCORE_RAM_SUPPORTED) `define TB_UNCORE_RAM_SUPPORTED; if (P.UNCORE_RAM_SUPPORTED) `define TB_UNCORE_RAM_SUPPORTED;
if (P.BPRED_SUPPORTED) `define TB_BPRED_SUPPORTED; if (P.BPRED_SUPPORTED) `define TB_BPRED_SUPPORTED;
if (P.BPRED_TYPE == BP_LOCAL_AHEAD | P.BPRED_TYPE == BP_LOCAL_REPAIR) `define TB_BHT; if (P.BPRED_TYPE == `BP_LOCAL_AHEAD | P.BPRED_TYPE == `BP_LOCAL_REPAIR) `define TB_BHT;
always @(posedge clk) begin always @(posedge clk) begin
if (ResetMem) // program memory is sometimes reset if (ResetMem) // program memory is sometimes reset
@ -342,7 +342,7 @@ module testbench;
if (P.BPRED_SUPPORTED) begin if (P.BPRED_SUPPORTED) begin
`ifdef TB_BPRED_SUPPORTED `ifdef TB_BPRED_SUPPORTED
// local history only // local history only
if (P.BPRED_TYPE == BP_LOCAL_AHEAD | P.BPRED_TYPE == BP_LOCAL_REPAIR) begin if (P.BPRED_TYPE == `BP_LOCAL_AHEAD | P.BPRED_TYPE == `BP_LOCAL_REPAIR) begin
`ifdef TB_BHT `ifdef TB_BHT
for(adrindex = 0; adrindex < 2**P.BPRED_NUM_LHR; adrindex++) for(adrindex = 0; adrindex < 2**P.BPRED_NUM_LHR; adrindex++)
dut.core.ifu.bpred.bpred.Predictor.DirPredictor.BHT.mem[adrindex] = 0; dut.core.ifu.bpred.bpred.Predictor.DirPredictor.BHT.mem[adrindex] = 0;

3
testbench/testbench.sv
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@ -27,6 +27,7 @@
`include "config.vh" `include "config.vh"
`include "tests.vh" `include "tests.vh"
`include "BranchPredictorType.vh"
import cvw::*; import cvw::*;
@ -332,7 +333,7 @@ module testbench;
if(reset) begin // branch predictor must always be reset if(reset) begin // branch predictor must always be reset
if (P.BPRED_SUPPORTED) begin if (P.BPRED_SUPPORTED) begin
// local history only // local history only
if (P.BPRED_TYPE == BP_LOCAL_AHEAD | P.BPRED_TYPE == BP_LOCAL_REPAIR) if (P.BPRED_TYPE == `BP_LOCAL_AHEAD | P.BPRED_TYPE == `BP_LOCAL_REPAIR)
for(adrindex = 0; adrindex < 2**P.BPRED_NUM_LHR; adrindex++) for(adrindex = 0; adrindex < 2**P.BPRED_NUM_LHR; adrindex++)
dut.core.ifu.bpred.bpred.Predictor.DirPredictor.BHT.mem[adrindex] = 0; dut.core.ifu.bpred.bpred.Predictor.DirPredictor.BHT.mem[adrindex] = 0;
for(adrindex = 0; adrindex < 2**P.BTB_SIZE; adrindex++) for(adrindex = 0; adrindex < 2**P.BTB_SIZE; adrindex++)