From 3ad815ce34199ed3a8b25a90f23f9739c24c5329 Mon Sep 17 00:00:00 2001
From: David Harris <David_Harris@hmc.edu>
Date: Wed, 22 May 2024 08:29:08 -0700
Subject: [PATCH] Reordered Zicond support in ALU

---
 src/ieu/alu.sv | 31 ++++++++++++++++---------------
 1 file changed, 16 insertions(+), 15 deletions(-)

diff --git a/src/ieu/alu.sv b/src/ieu/alu.sv
index 783d39495..e1cae73a6 100644
--- a/src/ieu/alu.sv
+++ b/src/ieu/alu.sv
@@ -60,7 +60,22 @@ module alu import cvw::*; #(parameter cvw_t P) (
   // CondShiftA is A for add/sub or a shifted version of A for shift-and-add BMU instructions
   assign CondMaskInvB = SubArith ? ~CondMaskB : CondMaskB;
   assign {Carry, Sum} = CondShiftA + CondMaskInvB + {{(P.XLEN-1){1'b0}}, SubArith};
-  
+
+  // Zicond block conditionally zeros B
+  if (P.ZICOND_SUPPORTED) begin: zicond
+    logic  BZero;
+    
+    assign BZero = (B == 0); // check if rs2 = 0
+    // Create a signal that is 0 when czero.* instruction should clear result
+    // If B = 0 for czero.eqz or if B != 0 for czero.nez
+    always_comb 
+     case (CZero)
+        2'b01:   ZeroCondMaskInvB = {P.XLEN{~BZero}}; // czero.eqz: kill if B = 0
+        2'b10:   ZeroCondMaskInvB = {P.XLEN{BZero}};  // czero.nez: kill if B != 0
+        default: ZeroCondMaskInvB = CondMaskInvB;     // otherwise normal behavior
+      endcase
+  end else assign ZeroCondMaskInvB = CondMaskInvB; // no masking if Zicond is not supported
+
   // Shifts (configurable for rotation)
   shifter #(P) sh(.A, .Amt(B[P.LOG_XLEN-1:0]), .Right(Funct3[2]), .W64, .SubArith, .Y(Shift), .Rotate(BALUControl[2]));
 
@@ -105,18 +120,4 @@ module alu import cvw::*; #(parameter cvw_t P) (
     assign CondShiftA = A;
   end
 
-  // Zicond block
-  if (P.ZICOND_SUPPORTED) begin: zicond
-    logic  BZero;
-    
-    assign BZero = (B == 0); // check if rs2 = 0
-    // Create a signal that is 0 when czero.* instruction should clear result
-    // If B = 0 for czero.eqz or if B != 0 for czero.nez
-    always_comb 
-     case (CZero)
-        2'b01:   ZeroCondMaskInvB = {P.XLEN{~BZero}}; // czero.eqz: kill if B = 0
-        2'b10:   ZeroCondMaskInvB = {P.XLEN{BZero}};  // czero.nez: kill if B != 0
-        default: ZeroCondMaskInvB = CondMaskInvB;     // otherwise normal behavior
-      endcase
-  end else assign ZeroCondMaskInvB = CondMaskInvB; // no masking if Zicond is not supported
 endmodule