From 369e8fb5ec72159f10e1683bccf45b005b6fcd49 Mon Sep 17 00:00:00 2001
From: David Harris <David_Harris@hmc.edu>
Date: Thu, 6 Jul 2023 12:41:46 -0700
Subject: [PATCH] Removed outdated commment about endianness

---
 src/privileged/csrsr.sv | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/privileged/csrsr.sv b/src/privileged/csrsr.sv
index 55db35f63..f474627f8 100644
--- a/src/privileged/csrsr.sv
+++ b/src/privileged/csrsr.sv
@@ -54,7 +54,6 @@ module csrsr import cvw::*;  #(parameter cvw_t P) (
   // STATUS REGISTER FIELD
   // See Privileged Spec Section 3.1.6
   // Lower privilege status registers are a subset of the full status register
-  // *** consider adding MBE, SBE, UBE fields, parameterized to be fixed or adjustable
   if (P.XLEN==64) begin: csrsr64 // RV64
     assign MSTATUS_REGW  = {STATUS_SD, 25'b0, STATUS_MBE, STATUS_SBE, STATUS_SXL, STATUS_UXL, 9'b0,
                            STATUS_TSR, STATUS_TW, STATUS_TVM, STATUS_MXR, STATUS_SUM, STATUS_MPRV,