Make fetch_buffer enableable in configs

config/rv32e/config.vh

@@ -116,6 +116,9 @@ localparam logic VIRTMEM_SUPPORTED = 0;
 localparam logic VECTORED_INTERRUPTS_SUPPORTED = 0;
 localparam logic BIGENDIAN_SUPPORTED = 0;
 
+// Fetch buffer configuration
+localparam logic FETCHBUFFER_SUPPORTED = 0;
+
 // TLB configuration.  Entries should be a power of 2
 localparam ITLB_ENTRIES = 32'd0;
 localparam DTLB_ENTRIES = 32'd0;

config/rv32gc/config.vh

@@ -116,6 +116,9 @@ localparam logic VIRTMEM_SUPPORTED = 1;
 localparam logic VECTORED_INTERRUPTS_SUPPORTED = 1;
 localparam logic BIGENDIAN_SUPPORTED = 1;
 
+// Fetch buffer configuration
+localparam logic FETCHBUFFER_SUPPORTED = 1;
+
 // TLB configuration.  Entries should be a power of 2
 localparam ITLB_ENTRIES = 32'd32;
 localparam DTLB_ENTRIES = 32'd32;

config/rv32i/config.vh

@@ -116,6 +116,9 @@ localparam logic VIRTMEM_SUPPORTED = 0;
 localparam logic VECTORED_INTERRUPTS_SUPPORTED = 1;
 localparam logic BIGENDIAN_SUPPORTED = 0;
 
+// Fetch buffer configuration
+localparam logic FETCHBUFFER_SUPPORTED = 1;
+
 // TLB configuration.  Entries should be a power of 2
 localparam ITLB_ENTRIES = 32'd32;
 localparam DTLB_ENTRIES = 32'd32;

config/rv32imc/config.vh

@@ -116,6 +116,9 @@ localparam logic VIRTMEM_SUPPORTED = 0;
 localparam logic VECTORED_INTERRUPTS_SUPPORTED = 1;
 localparam logic BIGENDIAN_SUPPORTED = 0;
 
+// Fetch buffer configuration
+localparam logic FETCHBUFFER_SUPPORTED = 1;
+
 // TLB configuration.  Entries should be a power of 2
 localparam ITLB_ENTRIES = 32'd0;
 localparam DTLB_ENTRIES = 32'd0;

config/rv64gc/config.vh

@@ -116,6 +116,9 @@ localparam logic VIRTMEM_SUPPORTED = 1;
 localparam logic VECTORED_INTERRUPTS_SUPPORTED = 1;
 localparam logic BIGENDIAN_SUPPORTED = 1;
 
+// Fetch buffer configuration
+localparam logic FETCHBUFFER_SUPPORTED = 1;
+
 // TLB configuration.  Entries should be a power of 2
 localparam ITLB_ENTRIES = 32'd32;
 localparam DTLB_ENTRIES = 32'd32;

config/rv64i/config.vh

@@ -116,6 +116,9 @@ localparam logic VIRTMEM_SUPPORTED = 0;
 localparam logic VECTORED_INTERRUPTS_SUPPORTED = 1;
 localparam logic BIGENDIAN_SUPPORTED = 0;
 
+// Fetch buffer configuration
+localparam logic FETCHBUFFER_SUPPORTED = 1;
+
 // TLB configuration.  Entries should be a power of 2
 localparam ITLB_ENTRIES = 32'd0;
 localparam DTLB_ENTRIES = 32'd0;

config/shared/parameter-defs.vh

@@ -45,6 +45,7 @@ localparam cvw_t P = '{
   ICACHE_WAYSIZEINBYTES :        ICACHE_WAYSIZEINBYTES,
   ICACHE_LINELENINBITS :        ICACHE_LINELENINBITS,
   CACHE_SRAMLEN : CACHE_SRAMLEN,
+  FETCHBUFFER_SUPPORTED : FETCHBUFFER_SUPPORTED,
   IDIV_BITSPERCYCLE :        IDIV_BITSPERCYCLE,
   IDIV_ON_FPU :        IDIV_ON_FPU,
   PMP_ENTRIES :        PMP_ENTRIES,

src/cvw.sv

@@ -74,6 +74,9 @@ typedef struct packed {
   logic         DCACHE_SUPPORTED;
   logic         ICACHE_SUPPORTED;
 
+  // Fetch Buffer Configuration
+  logic         FETCHBUFFER_SUPPORTED;
+
 // TLB configuration.  Entries should be a power of 2
   int           ITLB_ENTRIES;
   int           DTLB_ENTRIES;

src/ifu/ifu.sv

@@ -303,9 +303,12 @@ module ifu import cvw::*;  #(parameter cvw_t P) (
   assign IFUStallF = IFUCacheBusStallF | SelSpillNextF;
   assign GatedStallD = StallD & ~SelSpillNextF;
 
-  // flopenl #(32) AlignedInstrRawDFlop(clk, reset | FlushD, ~StallD, PostSpillInstrRawF, nop, InstrRawD);
-  // TODO: Test this?!?!?!
-  fetchbuffer #(P) fetchbuff(.clk, .reset, .StallF, .StallD, .FlushD, .WriteData(PostSpillInstrRawF), .ReadData(InstrRawD), .FetchBufferStallF); // Figure out what TODO with StallF
+  if (P.FETCHBUFFER_SUPPORTED) begin : fetchbuffer
+    fetchbuffer #(P) fetchbuff(.clk, .reset, .StallF, .StallD, .FlushD, .WriteData(PostSpillInstrRawF), .ReadData(InstrRawD), .FetchBufferStallF);
+  end else begin
+    flopenl #(32) AlignedInstrRawDFlop(clk, reset | FlushD, ~StallD, PostSpillInstrRawF, nop, InstrRawD);
+    assign FetchBufferStallF = '0;
+  end
 
   ////////////////////////////////////////////////////////////////////////////////////////////////
   // PCNextF logic