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Fix wsim fcov
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parent
b58ab831e7
commit
33904cffe2
4
bin/wsim
4
bin/wsim
@ -96,8 +96,8 @@ def prepSim(args, ElfFile):
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flagsList.append("--ccov")
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if args.fcov:
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flagsList.append("--fcov")
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defineList.append("+define+INCLUDE_TRACE2COV", "+define+IDV_INCLUDE_TRACE2COV", "+define+COVER_BASE_RV32I") # COVER_BASE_RV32I is just needed to keep riscvISACOV happy, but does not affect tests
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argsList.append("+TRACE2COV_ENABLE=1", "+IDV_TRACE2COV=1")
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defineList.extend(["+define+INCLUDE_TRACE2COV", "+define+IDV_INCLUDE_TRACE2COV", "+define+COVER_BASE_RV32I"]) # COVER_BASE_RV32I is just needed to keep riscvISACOV happy, but does not affect tests
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argsList.extend(["+TRACE2COV_ENABLE=1", "+IDV_TRACE2COV=1"])
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if args.gui:
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flagsList.append("--gui")
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if args.lockstep or args.lockstepverbose:
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