From 31ad619a216a6fdc2bc79e95071f737c8d080881 Mon Sep 17 00:00:00 2001
From: Ross Thompson <stephen.thompson.37@us.af.mil>
Date: Wed, 17 Mar 2021 11:06:32 -0500
Subject: [PATCH] Added possibly working OSU test bench as a precursor to
running a bp benchmark. Fixed a few bugs with the function radix.
---
wally-pipelined/bin/exe2memfile.pl | 3 +-
wally-pipelined/bin/extractFunctionRadix.sh | 2 +-
wally-pipelined/regression/wave.do | 52 ++++++++++++-------
wally-pipelined/testbench/function_radix.sv | 2 +
.../testbench/testbench-imperas.sv | 20 +++++--
5 files changed, 53 insertions(+), 26 deletions(-)
diff --git a/wally-pipelined/bin/exe2memfile.pl b/wally-pipelined/bin/exe2memfile.pl
index 1a9dbbb57..79b975c7a 100755
--- a/wally-pipelined/bin/exe2memfile.pl
+++ b/wally-pipelined/bin/exe2memfile.pl
@@ -17,10 +17,11 @@ my @memfilebytes = (0)*16384*4;
my $maxaddress = 0;
STDOUT->autoflush(1);
+# *** Ross Thompson I think there is a bug here needs to be +1
print ("Processing $#ARGV memfiles: ");
my $frac = $#ARGV/10;
for(my $i=0; $i<=$#ARGV; $i++) {
- if ($i % $frac == 0) { print ("$i ") };
+ if ($i < 10 || $i % $frac == 0) { print ("$i ") };
my $fname = $ARGV[$i];
# print "fname = $fname";
my $ofile = $fname.".objdump";
diff --git a/wally-pipelined/bin/extractFunctionRadix.sh b/wally-pipelined/bin/extractFunctionRadix.sh
index f5de782d7..cb37f5378 100755
--- a/wally-pipelined/bin/extractFunctionRadix.sh
+++ b/wally-pipelined/bin/extractFunctionRadix.sh
@@ -39,7 +39,7 @@ function processProgram {
# when size = 16 => 64 bit
# when size = 8 => 32 bit
- local listOfAddr=`egrep -i "^[0-9]{$size} <[0-9a-zA-Z_]+>" $objDumpFile`
+ local listOfAddr=`egrep -i "^[0-9a-f]{$size} <[0-9a-zA-Z_]+>" $objDumpFile`
# skip if the wrong bit width.
if [ -z "$listOfAddr" ]; then
diff --git a/wally-pipelined/regression/wave.do b/wally-pipelined/regression/wave.do
index c37d657bb..89d0fdeef 100644
--- a/wally-pipelined/regression/wave.do
+++ b/wally-pipelined/regression/wave.do
@@ -8,13 +8,26 @@ add wave -noupdate -expand -group {Execution Stage} /testbench/functionRadix/fun
add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/PCE
add wave -noupdate -expand -group {Execution Stage} /testbench/InstrEName
add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/InstrE
-add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/BPPredWrongE
-add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/CSRWritePendingDEM
-add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/RetM
-add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/TrapM
-add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/LoadStallD
-add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/InstrStall
-add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/DataStall
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/InstrMisalignedFaultM
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/InstrAccessFaultM
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/IllegalInstrFaultM
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/BreakpointFaultM
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/LoadMisalignedFaultM
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/StoreMisalignedFaultM
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/LoadAccessFaultM
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/StoreAccessFaultM
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/EcallFaultM
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/InstrPageFaultM
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/LoadPageFaultM
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/StorePageFaultM
+add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/InterruptM
+add wave -noupdate -group HDU -expand -group hazards /testbench/dut/hart/hzu/BPPredWrongE
+add wave -noupdate -group HDU -expand -group hazards /testbench/dut/hart/hzu/CSRWritePendingDEM
+add wave -noupdate -group HDU -expand -group hazards /testbench/dut/hart/hzu/RetM
+add wave -noupdate -group HDU -expand -group hazards /testbench/dut/hart/hzu/TrapM
+add wave -noupdate -group HDU -expand -group hazards /testbench/dut/hart/hzu/LoadStallD
+add wave -noupdate -group HDU -expand -group hazards /testbench/dut/hart/hzu/InstrStall
+add wave -noupdate -group HDU -expand -group hazards /testbench/dut/hart/hzu/DataStall
add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/hzu/FlushF
add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushD
add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushE
@@ -88,10 +101,10 @@ add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/neg
add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/lt
add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/ltu
add wave -noupdate /testbench/InstrFName
-add wave -noupdate -group dcache /testbench/dut/hart/MemAdrM
-add wave -noupdate -group dcache /testbench/dut/hart/MemPAdrM
-add wave -noupdate -group dcache /testbench/dut/hart/WriteDataM
-add wave -noupdate -group dcache /testbench/dut/hart/dmem/MemRWM
+add wave -noupdate -expand -group dcache /testbench/dut/hart/MemAdrM
+add wave -noupdate -expand -group dcache /testbench/dut/hart/MemPAdrM
+add wave -noupdate -expand -group dcache /testbench/dut/hart/WriteDataM
+add wave -noupdate -expand -group dcache /testbench/dut/hart/dmem/MemRWM
add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs1D
add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs2D
add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs1E
@@ -110,7 +123,13 @@ add wave -noupdate -group {alu execution stage} /testbench/dut/hart/ieu/dp/ALURe
add wave -noupdate -group {alu execution stage} /testbench/dut/hart/ieu/dp/SrcAE
add wave -noupdate -group {alu execution stage} /testbench/dut/hart/ieu/dp/SrcBE
add wave -noupdate /testbench/dut/hart/ieu/dp/ALUResultM
+add wave -noupdate -expand -group PCS /testbench/dut/hart/PCF
+add wave -noupdate -expand -group PCS /testbench/dut/hart/ifu/PCD
+add wave -noupdate -expand -group PCS /testbench/dut/hart/PCE
+add wave -noupdate -expand -group PCS /testbench/dut/hart/PCM
+add wave -noupdate -expand -group PCS /testbench/dut/hart/ifu/PCW
add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/FunctionAddr
+add wave -noupdate -group {function radix debug} -radix unsigned /testbench/functionRadix/function_radix/ProgramAddrIndex
add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/reset
add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/ProgramLabelMapLineCount
add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/ProgramLabelMapLine
@@ -124,14 +143,9 @@ add wave -noupdate -group {function radix debug} /testbench/functionRadix/functi
add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/FunctionAddr
add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/ProgramAddrIndex
add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/FunctionName
-add wave -noupdate -expand -group PCS /testbench/dut/hart/PCF
-add wave -noupdate -expand -group PCS /testbench/dut/hart/ifu/PCD
-add wave -noupdate -expand -group PCS /testbench/dut/hart/PCE
-add wave -noupdate -expand -group PCS /testbench/dut/hart/PCM
-add wave -noupdate -expand -group PCS /testbench/dut/hart/ifu/PCW
TreeUpdate [SetDefaultTree]
-WaveRestoreCursors {{Cursor 2} {3758805 ns} 0} {{Cursor 3} {4351471 ns} 0}
-quietly wave cursor active 2
+WaveRestoreCursors {{Cursor 2} {181681 ns} 0} {{Cursor 3} {20231927 ns} 0}
+quietly wave cursor active 1
configure wave -namecolwidth 250
configure wave -valuecolwidth 229
configure wave -justifyvalue left
@@ -146,4 +160,4 @@ configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
-WaveRestoreZoom {4351320 ns} {4351862 ns}
+WaveRestoreZoom {11339470 ns} {14752202 ns}
diff --git a/wally-pipelined/testbench/function_radix.sv b/wally-pipelined/testbench/function_radix.sv
index b5c34c2b5..e6bd479f4 100644
--- a/wally-pipelined/testbench/function_radix.sv
+++ b/wally-pipelined/testbench/function_radix.sv
@@ -85,9 +85,11 @@ module function_radix(reset, ProgramAddrMapFile, ProgramLabelMapFile);
// if it is greather we want 1 less than left.
if (array[left] < pc) begin
minval = array[left];
+ mid = left;
return;
end else begin
minval = array[left-1];
+ mid = left - 1;
return;
end
end
diff --git a/wally-pipelined/testbench/testbench-imperas.sv b/wally-pipelined/testbench/testbench-imperas.sv
index 3c9c4cc91..7b7d7f95b 100644
--- a/wally-pipelined/testbench/testbench-imperas.sv
+++ b/wally-pipelined/testbench/testbench-imperas.sv
@@ -28,6 +28,7 @@
module testbench();
parameter DEBUG = 0;
+ parameter TESTSBP = 0;
logic clk;
logic reset;
@@ -314,6 +315,10 @@ string tests32i[] = {
"rv32i/WALLY-CSRRCI", "3000"
};
+
+ string testsBP64[] = '{
+ "rv64BP/reg-test", "10000"
+ };
string tests[];
string ProgramAddrMapFile, ProgramLabelMapFile;
logic [`AHBW-1:0] HRDATAEXT;
@@ -332,13 +337,18 @@ string tests32i[] = {
// pick tests based on modes supported
initial
if (`XLEN == 64) begin // RV64
- tests = {tests64i};
- if (`C_SUPPORTED) tests = {tests, tests64ic};
- else tests = {tests, tests64iNOc};
- if (`M_SUPPORTED) tests = {tests, tests64m};
- if (`A_SUPPORTED) tests = {tests, tests64a};
+ if(TESTSBP) begin
+ tests = testsBP64;
+ end else begin
+ tests = {tests64i};
+ if (`C_SUPPORTED) tests = {tests, tests64ic};
+ else tests = {tests, tests64iNOc};
+ if (`M_SUPPORTED) tests = {tests, tests64m};
+ if (`A_SUPPORTED) tests = {tests, tests64a};
+ end
// tests = {tests64a, tests};
end else begin // RV32
+ // *** add the 32 bit bp tests
tests = {tests32i};
if (`C_SUPPORTED % 2 == 1) tests = {tests, tests32ic};
else tests = {tests, tests32iNOc};