diff --git a/pipelined/src/privileged/privmode.sv b/pipelined/src/privileged/privmode.sv
index 768d8a364..b09296429 100644
--- a/pipelined/src/privileged/privmode.sv
+++ b/pipelined/src/privileged/privmode.sv
@@ -44,12 +44,11 @@ module privmode (
     // PrivilegeMode FSM
     always_comb begin
       if (TrapM) begin // Change privilege based on DELEG registers (see 3.1.8)
-        if (`S_SUPPORTED & DelegateM)
-                          NextPrivilegeModeM = `S_MODE;
-        else              NextPrivilegeModeM = `M_MODE;
-      end else if (mretM) NextPrivilegeModeM = STATUS_MPP;
-      else if (sretM)     NextPrivilegeModeM = {1'b0, STATUS_SPP};
-      else                NextPrivilegeModeM = PrivilegeModeW;
+        if (`S_SUPPORTED & DelegateM) NextPrivilegeModeM = `S_MODE;
+        else                          NextPrivilegeModeM = `M_MODE;
+      end else if (mretM)             NextPrivilegeModeM = STATUS_MPP;
+      else if (sretM)                 NextPrivilegeModeM = {1'b0, STATUS_SPP};
+      else                            NextPrivilegeModeM = PrivilegeModeW;
     end
 
     flopenl #(2) privmodereg(clk, reset, ~StallW, NextPrivilegeModeM, `M_MODE, PrivilegeModeW);
diff --git a/pipelined/src/privileged/trap.sv b/pipelined/src/privileged/trap.sv
index 7bee52a01..35d680a62 100644
--- a/pipelined/src/privileged/trap.sv
+++ b/pipelined/src/privileged/trap.sv
@@ -64,7 +64,7 @@ module trap (
   assign IntPendingM = |PendingIntsM;
   assign ValidIntsM = {12{MIntGlobalEnM}} & PendingIntsM & ~MIDELEG_REGW | {12{SIntGlobalEnM}} & PendingIntsM & MIDELEG_REGW; 
   assign InterruptM = (|ValidIntsM) && InstrValidM && ~(CommittedM);  // *** RT. CommittedM is a temporary hack to prevent integer division from having an interrupt during divide.
-  assign DelegateM = (InterruptM ? MIDELEG_REGW[CauseM[3:0]] : MEDELEG_REGW[CauseM]) & 
+  assign DelegateM = `S_SUPPORTED & (InterruptM ? MIDELEG_REGW[CauseM[3:0]] : MEDELEG_REGW[CauseM]) & 
                      (PrivilegeModeW == `U_MODE | PrivilegeModeW == `S_MODE);
 
   ///////////////////////////////////////////