From 30d017c2589551b3e7ec414d3aeeea9dadb34739 Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Mon, 17 Apr 2023 12:16:31 -0500 Subject: [PATCH] Lowered arty a7 clock frequency to 15Mhz to meet timing. can probalby go faster. --- fpga/generator/xlnx_mmcm.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpga/generator/xlnx_mmcm.tcl b/fpga/generator/xlnx_mmcm.tcl index 2f003e7a5..0d1398470 100644 --- a/fpga/generator/xlnx_mmcm.tcl +++ b/fpga/generator/xlnx_mmcm.tcl @@ -15,7 +15,7 @@ set_property -dict [list CONFIG.PRIM_IN_FREQ {100.000} \ CONFIG.CLKOUT4_USED {false} \ CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {166.66667} \ CONFIG.CLKOUT2_REQUESTED_OUT_FREQ {200} \ - CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {20} \ + CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {15} \ CONFIG.CLKIN1_JITTER_PS {10.0} \ ] [get_ips $ipName]