From 10c2d458882cce09ff01bb6a8ca1d4d27a652e83 Mon Sep 17 00:00:00 2001 From: cturek Date: Wed, 30 Nov 2022 02:32:04 +0000 Subject: [PATCH] div tests in sim-wally --- pipelined/regression/sim-wally | 2 +- pipelined/testbench/tests.vh | 22 +++++++++++----------- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/pipelined/regression/sim-wally b/pipelined/regression/sim-wally index 583396fd7..636bb8ff9 100755 --- a/pipelined/regression/sim-wally +++ b/pipelined/regression/sim-wally @@ -1,2 +1,2 @@ -vsim -do "do wally-pipelined.do rv32ic wally32periph" +vsim -do "do wally-pipelined.do rv32gc arch32m" diff --git a/pipelined/testbench/tests.vh b/pipelined/testbench/tests.vh index bb505c757..b994f5e2e 100644 --- a/pipelined/testbench/tests.vh +++ b/pipelined/testbench/tests.vh @@ -1413,6 +1413,17 @@ string imperas32f[] = '{ string arch32f[] = '{ `RISCVARCHTEST, + "rv32i_m/F/src/fdiv_b20-01.S", + "rv32i_m/F/src/fdiv_b1-01.S", + "rv32i_m/F/src/fdiv_b2-01.S", + "rv32i_m/F/src/fdiv_b21-01.S", + "rv32i_m/F/src/fdiv_b3-01.S", + "rv32i_m/F/src/fdiv_b4-01.S", + "rv32i_m/F/src/fdiv_b5-01.S", + "rv32i_m/F/src/fdiv_b6-01.S", + "rv32i_m/F/src/fdiv_b7-01.S", + "rv32i_m/F/src/fdiv_b8-01.S", + "rv32i_m/F/src/fdiv_b9-01.S", "rv32i_m/F/src/fadd_b10-01.S", "rv32i_m/F/src/fadd_b1-01.S", "rv32i_m/F/src/fadd_b11-01.S", @@ -1443,17 +1454,6 @@ string imperas32f[] = '{ "rv32i_m/F/src/fcvt.wu.s_b27-01.S", "rv32i_m/F/src/fcvt.wu.s_b28-01.S", "rv32i_m/F/src/fcvt.wu.s_b29-01.S", - "rv32i_m/F/src/fdiv_b1-01.S", - "rv32i_m/F/src/fdiv_b20-01.S", - "rv32i_m/F/src/fdiv_b2-01.S", - "rv32i_m/F/src/fdiv_b21-01.S", - "rv32i_m/F/src/fdiv_b3-01.S", - "rv32i_m/F/src/fdiv_b4-01.S", - "rv32i_m/F/src/fdiv_b5-01.S", - "rv32i_m/F/src/fdiv_b6-01.S", - "rv32i_m/F/src/fdiv_b7-01.S", - "rv32i_m/F/src/fdiv_b8-01.S", - "rv32i_m/F/src/fdiv_b9-01.S", "rv32i_m/F/src/feq_b1-01.S", "rv32i_m/F/src/feq_b19-01.S", "rv32i_m/F/src/fle_b1-01.S",