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	More ifu cleanup.
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				| @ -206,10 +206,6 @@ module ifu ( | |||||||
|        .PMPADDR_ARRAY_REGW       |        .PMPADDR_ARRAY_REGW       | ||||||
|        ); |        ); | ||||||
| 
 | 
 | ||||||
| 
 |  | ||||||
| 
 |  | ||||||
| 
 |  | ||||||
|    |  | ||||||
|   // conditional
 |   // conditional
 | ||||||
|   // 1. ram // controlled by `MEM_IROM
 |   // 1. ram // controlled by `MEM_IROM
 | ||||||
|   // 2. cache // `MEM_ICACHE
 |   // 2. cache // `MEM_ICACHE
 | ||||||
| @ -380,10 +376,10 @@ module ifu ( | |||||||
|    |    | ||||||
|   assign  PCNextF = {UnalignedPCNextF[`XLEN-1:1], 1'b0}; // hart-SPEC p. 21 about 16-bit alignment
 |   assign  PCNextF = {UnalignedPCNextF[`XLEN-1:1], 1'b0}; // hart-SPEC p. 21 about 16-bit alignment
 | ||||||
|   // *** double check this enable.  It cannot be correct.
 |   // *** double check this enable.  It cannot be correct.
 | ||||||
|   flopenl #(`XLEN) pcreg(clk, reset, ~StallF & ~ICacheStallF, PCNextF, `RESET_VECTOR, PCF); |   flopenl #(`XLEN) pcreg(clk, reset, ~StallF, PCNextF, `RESET_VECTOR, PCF); | ||||||
| 
 | 
 | ||||||
|   // branch and jump predictor
 |   // branch and jump predictor
 | ||||||
|   if (`BPRED_ENABLED == 1) begin : bpred |   if (`BPRED_ENABLED) begin : bpred | ||||||
|     bpred bpred(.clk, .reset, |     bpred bpred(.clk, .reset, | ||||||
|         .StallF, .StallD, .StallE, |         .StallF, .StallD, .StallE, | ||||||
|         .FlushF, .FlushD, .FlushE, |         .FlushF, .FlushD, .FlushE, | ||||||
|  | |||||||
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