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https://github.com/openhwgroup/cvw
synced 2025-01-23 21:14:37 +00:00
sweep debugging
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parent
6c6c56e102
commit
2c762fd479
@ -56,16 +56,6 @@ if { [shell_is_in_topographical_mode] } {
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echo "In Topographical Mode...processing\n"
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create_mw_lib -technology $MW_REFERENCE_LIBRARY/$MW_TECH_FILE.tf \
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-mw_reference_library $mw_reference_library $outputDir/$MY_LIB_NAME
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# if {[file isdirectory $MY_LIB_NAME]} {
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#echo "MW directory already here, deleting/reading."
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#[exec rm -rf $my_toplevel]
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# create_mw_lib -technology $MW_REFERENCE_LIBRARY/$MW_TECH_FILE.tf \
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# -mw_reference_library $mw_reference_library $MY_LIB_NAME
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# } else {
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# create_mw_lib -technology $MW_REFERENCE_LIBRARY/$MW_TECH_FILE.tf \
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# -mw_reference_library $mw_reference_library $MY_LIB_NAME
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# }
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# Open MW
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open_mw_lib $outputDir/$MY_LIB_NAME
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@ -74,10 +64,6 @@ if { [shell_is_in_topographical_mode] } {
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-tech2itf_map $PRS_MAP_FILE
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} else {
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if {[file isdirectory $MY_LIB_NAME]} {
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[exec rm -rf $my_toplevel]
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echo "MW directory already here, deleting."
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}
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echo "In normal DC mode...processing\n"
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}
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@ -154,7 +140,7 @@ if {$tech == "sky130"} {
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} elseif {$drive == "FLOP"} {
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set_driving_cell -lib_cell scc9gena_dfxbp_1 -pin Q $all_in_ex_clk
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}
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} elseif {$tech == "tsmc28" || $tech="tsmc28psyn"} {
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} elseif {$tech == "tsmc28" || $tech=="tsmc28psyn"} {
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if {$drive == "INV"} {
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set_driving_cell -lib_cell INVD1BWP30P140 -pin ZN $all_in_ex_clk
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} elseif {$drive == "FLOP"} {
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@ -180,7 +166,7 @@ if {$tech == "sky130"} {
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} elseif {$drive == "FLOP"} {
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set_load [expr [load_of scc9gena_tt_1.2v_25C/scc9gena_dfxbp_1/D] * 1] [all_outputs]
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}
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} elseif {$tech == "tsmc28" || $tech = "tsmc28psyn"} {
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} elseif {$tech == "tsmc28" || $tech == "tsmc28psyn"} {
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if {$drive == "INV"} {
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set_load [expr [load_of tcbn28hpcplusbwp30p140tt0p9v25c/INVD4BWP30P140/I] * 1] [all_outputs]
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} elseif {$drive == "FLOP"} {
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@ -188,7 +174,7 @@ if {$tech == "sky130"} {
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}
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}
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if ($tech != "tsmc28psyn") {
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if {$tech != "tsmc28psyn"} {
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# Set the wire load model
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set_wire_load_mode "top"
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}
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