From 29efd1d222c0143c25f4c457953aad57ce2f0bb5 Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Thu, 9 Sep 2021 15:08:10 -0500 Subject: [PATCH] Third attempt at fixing the write enables for the icache cacheway. --- wally-pipelined/src/cache/icache.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/wally-pipelined/src/cache/icache.sv b/wally-pipelined/src/cache/icache.sv index 10f077c7a..4123475ab 100644 --- a/wally-pipelined/src/cache/icache.sv +++ b/wally-pipelined/src/cache/icache.sv @@ -142,7 +142,7 @@ module icache .RAdr(RAdr), .PAdr(PCTagF), .WriteEnable(SRAMWayWriteEnable), - .WriteWordEnable({NUMWAYS{1'b1}}), + .WriteWordEnable({{(BLOCKLEN/`XLEN){1'b1}}}), .TagWriteEnable(SRAMWayWriteEnable), .WriteData(ICacheMemWriteData), .SetValid(ICacheMemWriteEnable),