Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

update README on ppa

Browse Source
This commit is contained in:
James E. Stine 2023-11-09 01:00:33 -06:00
parent 20e1e12234
commit 29d6fe8fea
1 changed files with 9 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
synthDC/README.md
View File

@ -31,3 +31,12 @@ SAIFPOWER
0: switching factor power analysis 0: switching factor power analysis
1: RTL simulation driven power analysis. 1: RTL simulation driven power analysis.
-----
Extra Tool (PPA)
To run ppa analysis that hones into target frequency, you can type:
python3 ppa/ppaSynth.py from the synthDC directory. This runs a sweep
across all modules listed at the bottom of the ppaSynth.py file.