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Changed RV32i config to use DTIM and bus. Don't use this commit - it will break rv32i tests.

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This commit is contained in:
David Harris 2022-10-05 11:45:31 -07:00
parent beb954ae27
commit 29033dc334
1 changed files with 8 additions and 8 deletions
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16
pipelined/config/rv32i/wally-config.vh
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@ -51,9 +51,9 @@
`define UARCH_SINGLECYCLE 0
// LSU microarchitectural Features
`define BUS 1
`define DCACHE 1
`define ICACHE 1
`define VIRTMEM_SUPPORTED 1
`define DCACHE 0
`define ICACHE 0
`define VIRTMEM_SUPPORTED 0
`define VECTORED_INTERRUPTS_SUPPORTED 1
`define BIGENDIAN_SUPPORTED 0
@ -86,16 +86,16 @@
// Peripheral Addresses
// Peripheral memory space extends from BASE to BASE+RANGE
// Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
`define DTIM_SUPPORTED 1'b0
`define DTIM_SUPPORTED 1'b1
`define DTIM_BASE 34'h80000000
`define DTIM_RANGE 34'h00001FFF
`define IROM_SUPPORTED 1'b0
`define DTIM_RANGE 34'h07FFFFFF
`define IROM_SUPPORTED 1'b1
`define IROM_BASE 34'h80000000
`define IROM_RANGE 34'h00001FFF
`define IROM_RANGE 34'h07FFFFFF
`define BOOTROM_SUPPORTED 1'b1
`define BOOTROM_BASE 34'h00001000
`define BOOTROM_RANGE 34'h00000FFF
`define UNCORE_RAM_SUPPORTED 1'b1
`define UNCORE_RAM_SUPPORTED 1'b0
`define UNCORE_RAM_BASE 34'h80000000
`define UNCORE_RAM_RANGE 34'h07FFFFFF
`define EXT_MEM_SUPPORTED 1'b0