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	Fix HSIZE and HBURST signal widths in PMA checker
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				| @ -29,12 +29,13 @@ | |||||||
| 
 | 
 | ||||||
| module pmachecker ( | module pmachecker ( | ||||||
|   input  logic [31:0] HADDR, |   input  logic [31:0] HADDR, | ||||||
|   input  logic        HSIZE, |   input  logic [2:0]  HSIZE, | ||||||
|   input  logic        HWRITE, |   input  logic        HWRITE, | ||||||
|   input  logic        HBURST, |   input  logic [2:0]  HBURST, | ||||||
| 
 | 
 | ||||||
|   input  logic        Atomic, Execute, Write, Read, |   input  logic        Atomic, Execute, Write, Read, | ||||||
| 
 | 
 | ||||||
|  |   // *** Add pipeline suffixes
 | ||||||
|   output logic        Cacheable, Idempotent, AtomicAllowed, |   output logic        Cacheable, Idempotent, AtomicAllowed, | ||||||
|   output logic        SquashAHBAccess, |   output logic        SquashAHBAccess, | ||||||
| 
 | 
 | ||||||
|  | |||||||
| @ -56,7 +56,8 @@ module privileged ( | |||||||
| 
 | 
 | ||||||
|   // PMA checker signals
 |   // PMA checker signals
 | ||||||
|   input  logic [31:0]      HADDR, |   input  logic [31:0]      HADDR, | ||||||
|   input  logic             HSIZE, HWRITE, HBURST, |   input  logic [2:0]       HSIZE, HBURST, | ||||||
|  |   input  logic             HWRITE, | ||||||
|   input  logic             Atomic, Execute, Write, Read, |   input  logic             Atomic, Execute, Write, Read, | ||||||
|   output logic             Cacheable, Idempotent, AtomicAllowed, |   output logic             Cacheable, Idempotent, AtomicAllowed, | ||||||
|   output logic             SquashAHBAccess, |   output logic             SquashAHBAccess, | ||||||
|  | |||||||
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